[kernel-hardening] Re: [PATCH v2] powerpc/mm: Add support for runtime configuration of ASLR limits

[Michael Ellerman]

Kees Cook <keescook at chromium.org> writes:
> On Mon, Apr 24, 2017 at 7:29 AM, Michael Ellerman <mpe at ellerman.id.au> wrote:
>> Balbir Singh <bsingharora at gmail.com> writes:
>>>> diff --git a/arch/powerpc/mm/mmap.c b/arch/powerpc/mm/mmap.c
>>>> index a5d9ef59debe..6141cfff634e 100644
>>>> --- a/arch/powerpc/mm/mmap.c
>>>> +++ b/arch/powerpc/mm/mmap.c
>>>> @@ -59,13 +59,14 @@ static inline int mmap_is_legacy(void)
>>>>
>>>>  unsigned long arch_mmap_rnd(void)
>>>>  {
>>>> -    unsigned long rnd;
>>>> +    unsigned long shift, rnd;
>>>>
>>>> -    /* 8MB for 32bit, 1GB for 64bit */
>>>> +    shift = mmap_rnd_bits;
>>>> +#ifdef CONFIG_COMPAT
>>>>      if (is_32bit_task())
>>>> -            rnd = get_random_long() % (1<<(23-PAGE_SHIFT));
>>>> -    else
>>>> -            rnd = get_random_long() % (1UL<<(30-PAGE_SHIFT));
>>>> +            shift = mmap_rnd_compat_bits;
>>>> +#endif
>>>> +    rnd = get_random_long() % (1 << shift);
>>>
>>> Nitpick, 1 should be 1UL?
>
> Nice catch!
>
>> No, shift can only be 29 at most IIRC?
>
> The largest value in the kconfigs is 33?

Yeah you're right, for the 4K page kernel it can be 33.

Will fix.

cheers