[PATCH v11 2/7] PCI: A fix for caculating bridge window's size and alignment

[Yongji Xie]

Hi Yinghai,

On 18 April 2017 at 05:45, Yinghai Lu <yinghai at kernel.org> wrote:
> On Mon, Apr 17, 2017 at 2:36 PM, Bjorn Helgaas <bhelgaas at google.com> wrote:
>> From: Yongji Xie <elohimes at gmail.com>
>>
>> In case that one device's alignment is greater than its size,
>> we may get an incorrect size and alignment for its bus's memory
>> window in pbus_size_mem(). This patch fixes this case.
>
> In which case, that device alignment is not same as size?
> or powerpc need small size, but alignment is PAGE_SIZE?
>

Yes, powerpc may have some small size (smaller than PAGE_SIZE)
devices whose alignment would be enforced to be PAGE_SIZE
by pcibios_default_alignment() (in patch 4).

Thanks,
Yongji