[PATCH V4 7/7] cxl: Add psl9 specific code
mpe at ellerman.id.au
Wed Apr 12 21:47:10 AEST 2017
christophe lombard <clombard at linux.vnet.ibm.com> writes:
> Le 12/04/2017 à 04:11, Michael Ellerman a écrit :
> Here is a new patch which updates the documentation based
> on the complet PATCH V4 7/7.
> Let me know if it suits you.
Fine by me, I'll wait for Fred's ack before I merge it all.
> Index: capi2_linux_prepare_patch_V4/Documentation/powerpc/cxl.txt
> --- capi2_linux_prepare_patch_V4.orig/Documentation/powerpc/cxl.txt
> +++ capi2_linux_prepare_patch_V4/Documentation/powerpc/cxl.txt
> @@ -62,6 +62,7 @@ Hardware overview
> POWER8 <-----> PSL Version 8 is compliant to the CAIA Version 1.0.
> POWER9 <-----> PSL Version 9 is compliant to the CAIA Version 2.0.
> This PSL Version 9 provides new features as:
> + * Interaction with the nest MMU which resides within each P9 chip.
> * Native DMA support.
> * Supports sending ASB_Notify messages for host thread wakeup.
> * Supports Atomic operations.
The path didn't actually apply, the whitespace is messed up, but I fixed
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