[RFC PATCH] powerpc/mm/hugetlb: Add support for 1G huge pages

[Anshuman Khandual]

On 04/04/2017 07:33 PM, Aneesh Kumar K.V wrote:
> This patch adds support for gigantic pages in ppc64. We also updates
> gigantic_page_supported helper such that arch can override it.

Seems like only radix based 1GB is considered as gigantic page in this
implementation. What about the existing 16GB pages support ? IIUC they
are still supported currently as gigantic pages (as defined in generic
HugeTLB) if the platform gives us reserved memory areas during boot.
Can you explain how this is going to be different ?

> 
> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar at linux.vnet.ibm.com>
> ---
>  arch/powerpc/include/asm/book3s/64/hugetlb.h | 9 +++++++++
>  arch/powerpc/mm/hugetlbpage.c                | 7 +++++--
>  arch/powerpc/platforms/Kconfig.cputype       | 1 +
>  mm/hugetlb.c                                 | 4 ++++
>  4 files changed, 19 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/powerpc/include/asm/book3s/64/hugetlb.h b/arch/powerpc/include/asm/book3s/64/hugetlb.h
> index 6666cd366596..a994d069fdaf 100644
> --- a/arch/powerpc/include/asm/book3s/64/hugetlb.h
> +++ b/arch/powerpc/include/asm/book3s/64/hugetlb.h
> @@ -50,4 +50,13 @@ static inline pte_t arch_make_huge_pte(pte_t entry, struct vm_area_struct *vma,
>  	else
>  		return entry;
>  }
> +
> +#define gigantic_page_supported gigantic_page_supported
> +static inline bool gigantic_page_supported(void)
> +{
> +	if (radix_enabled())
> +		return true;
> +	return false;
> +}

POWER8 (non radix MMU) cannot have 16GB gigantic HugeTLB pages ?

> +
>  #endif
> diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
> index a4f33de4008e..80f6d2ed551a 100644
> --- a/arch/powerpc/mm/hugetlbpage.c
> +++ b/arch/powerpc/mm/hugetlbpage.c
> @@ -763,8 +763,11 @@ static int __init add_huge_page_size(unsigned long long size)
>  	 * Hash: 16M and 16G
>  	 */
>  	if (radix_enabled()) {
> -		if (mmu_psize != MMU_PAGE_2M)
> -			return -EINVAL;
> +		if (mmu_psize != MMU_PAGE_2M) {
> +			if (cpu_has_feature(CPU_FTR_POWER9_DD1) ||
> +			    (mmu_psize != MMU_PAGE_1G))
> +				return -EINVAL;
> +		}

The comment above this code block needs to be updated as well for
this new page size addition. I understand that this code block
was added to protect against wrong device tree supplied page size
values but wondering dont we require one such check for normal page
sizes as well (non HugeTLB) ? But anyways, thats a different topic.