[PATCH 0/5] crypto/nx: Enable NX 842 compression engine on Power9

[Haren Myneni]

[PATCH 0/5] crypto/nx: Enable NX 842 compression engine on Power9

P9 introduces Virtual Accelerator Switchboard (VAS) to communicate
with NX 842 engine. icswx function is used to access NX before.
On powerNV systems, NX-842 driver invokes VAS functions for
configuring RxFIFO (receive window) per each NX engine. VAS uses
this FIFO to communicate the request to NX. The kernel opens send 
window which is used to transfer compression/decompression requests 
to VAS. It maps the send window to the corresponding RxFIFO. 
copy/paste instructions are used to pass the CRB to VAS.

This patch series adds P9 NX support for 842 compression engine.
First 3 patches reorganize the current code so that VAS function
can be added.
- nx842_powernv_function points to VAS function if VAS feature is
  available. Otherwise icswx function is used.
- Move configure CRB code nx842_cfg_crb() 
- In addition to freeing co-processor structs for initialization 
  failures and exit, both send and receive windows have to closed
  for VAS.

The last 2 patches adds configuring and invoking VAS, and also 
checking P9 NX specific errors that are provided in co-processor 
status block (CSB) for failures.

Haren Myneni (5):
  crypto/nx: Rename nx842_powernv_function as icswx function
  crypto/nx: Create nx842_cfg_crb function
  crypto/nx: Create nx842_delete_coproc function
  crypto/nx: Add P9 NX support for 842 compression engine.
  crypto/nx: Add P9 NX specific error codes for 842 engine

 arch/powerpc/include/asm/icswx.h   |   3 +
 arch/powerpc/include/asm/vas.h     |   2 +
 drivers/crypto/nx/Kconfig          |   1 +
 drivers/crypto/nx/nx-842-powernv.c | 435 +++++++++++++++++++++++++++++++++----
 drivers/crypto/nx/nx-842.h         |   8 +
 5 files changed, 407 insertions(+), 42 deletions(-)

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1.8.3.1