[PATCH] powerpc: cmp -> cmpd for 64-bit

Vaidyanathan Srinivasan svaidy at linux.vnet.ibm.com
Thu Oct 13 04:00:05 AEDT 2016


* Segher Boessenkool <segher at kernel.crashing.org> [2016-10-12 08:26:48]:

> On Wed, Oct 12, 2016 at 02:05:19PM +1100, Michael Ellerman wrote:
> > Segher Boessenkool <segher at kernel.crashing.org> writes:
> > 

[snip]

> 
> > > --- a/arch/powerpc/include/asm/cpuidle.h
> > > +++ b/arch/powerpc/include/asm/cpuidle.h
> > > @@ -26,7 +26,7 @@ extern u64 pnv_first_deep_stop_state;
> > 
> > #define	IDLE_STATE_ENTER_SEQ(IDLE_INST)				\
> > 	/* Magic NAP/SLEEP/WINKLE mode enter sequence */	\
> > >  	std	r0,0(r1);					\
> > >  	ptesync;						\
> > >  	ld	r0,0(r1);					\
> > > -1:	cmp	cr0,r0,r0;					\
> > > +1:	cmpd	cr0,r0,r0;					\
> > >  	bne	1b;						\
> > >  	IDLE_INST;						\
> > >  	b	.
> > 
> > What's this one doing, is it a bug? I can't really tell without knowing
> > what the magic sequence is meant to do.

This one is the recommended idle state entry sequence described in
ISA.  We need to ensure the context is fully saved and also create
a register dependency using cmp and loop which will ideally not be
taken.  This will get the thread (pipeline) ready to start losing
state when the idle instruction is executed.

ISA 2.07 Section: 3.3.2.1 Entering and Exiting Power-Saving Mode

> 
> It looks like it is making sure the ptesync is done.  The ld/cmp/bne
> is the usual to make sure the ld is done, and in std/ptesync/ld the ld
> won't be done before the ptesync is done.
> 
> The cmp always compares equal, of course, so both cmpw and cmpd would
> work fine here.  cmpd looks better after ld ;-)

Yes :)

cmpd or cmpw would provide same result as far as this code sequence is
concerned.  I agree that cpmd is more appropriate here.

--Vaidy



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