[PATCH v6 0/7] Radix pte update tlbflush optimizations.
Aneesh Kumar K.V
aneesh.kumar at linux.vnet.ibm.com
Sun Nov 27 00:44:26 AEDT 2016
"Aneesh Kumar K.V" <aneesh.kumar at linux.vnet.ibm.com> writes:
> Changes from V5:
> Switch to use pte bits to track page size.
I am now testing a new version that will limit this new pte bit usage
only on DD1.
>
> Aneesh Kumar K.V (7):
> powerpc/mm: Rename hugetlb-radix.h to hugetlb.h
> powerpc/mm/hugetlb: Handle hugepage size supported by hash config
> powerpc/mm: Introduce _PAGE_GIGANTIC and _PAGE_LARGE software pte bits
> powerpc/mm: Add radix__tlb_flush_pte
> powerpc/mm: update radix__ptep_set_access_flag to not do full mm tlb
> flush
> powerpc/mm: update radix__pte_update to not do full mm tlb flush
> powerpc/mm: Batch tlb flush when invalidating pte entries
>
> arch/powerpc/include/asm/book3s/32/pgtable.h | 3 ++-
> .../asm/book3s/64/{hugetlb-radix.h => hugetlb.h} | 21 ++++++++++++++--
> arch/powerpc/include/asm/book3s/64/pgtable.h | 15 ++++++++++--
> arch/powerpc/include/asm/book3s/64/radix.h | 28 ++++++++++------------
> .../powerpc/include/asm/book3s/64/tlbflush-radix.h | 2 ++
> arch/powerpc/include/asm/hugetlb.h | 2 +-
> arch/powerpc/include/asm/nohash/32/pgtable.h | 3 ++-
> arch/powerpc/include/asm/nohash/64/pgtable.h | 3 ++-
> arch/powerpc/mm/pgtable-book3s64.c | 3 ++-
> arch/powerpc/mm/pgtable.c | 2 +-
> arch/powerpc/mm/tlb-radix.c | 11 +++++++++
> 11 files changed, 67 insertions(+), 26 deletions(-)
> rename arch/powerpc/include/asm/book3s/64/{hugetlb-radix.h => hugetlb.h} (55%)
>
> --
> 2.10.2
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