[PATCH 09/13] KVM: PPC: Book3S HV: Adapt TLB invalidations to work on POWER9
Paul Mackerras
paulus at ozlabs.org
Sat Nov 19 15:14:34 AEDT 2016
On Sat, Nov 19, 2016 at 08:57:28AM +1100, Benjamin Herrenschmidt wrote:
> On Fri, 2016-11-18 at 20:11 +0530, Aneesh Kumar K.V wrote:
> > > + * Work out how many sets the TLB has, for the use of
> > > + * the TLB invalidation loop in book3s_hv_rmhandlers.S.
> > > + */
> > > + if (cpu_has_feature(CPU_FTR_ARCH_300))
> > > + kvm->arch.tlb_sets = 256; /* POWER9 */
> > > + else if (cpu_has_feature(CPU_FTR_ARCH_207S))
> > > + kvm->arch.tlb_sets = 512; /* POWER8 */
> > > + else
> > > + kvm->arch.tlb_sets = 128; /* POWER7 */
> > > +
> >
> > We have
> >
> > #define POWER7_TLB_SETS 128 /* # sets in POWER7 TLB */
> > #define POWER8_TLB_SETS 512 /* # sets in POWER8 TLB */
> > #define POWER9_TLB_SETS_HASH 256 /* # sets in POWER9 TLB Hash mode */
> > #define POWER9_TLB_SETS_RADIX 128 /* # sets in POWER9 TLB Radix mode */
> >
> > May be use that instead of opencoding ?
>
> Both are bad and are going to kill us for future backward
> compatibility.
>
> These should be a device-tree property. We can fallback to hard wired
> values if it doesn't exist but we should at least look for one.
Tell me what the property is called and I'll add code to use it. :)
That's the whole reason why I moved this to C code.
> Note: P8 firmwares all have a bug creating a bogus "tlb-sets" property
> in the CPU node, so let's create a new one instead, with 2 entries
> (hash vs. radix) or 2 new ones, one for hash and one for radix (when
> available).
Paul.
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