[PATCH 09/13] KVM: PPC: Book3S HV: Adapt TLB invalidations to work on POWER9

[Paul Mackerras]

On Fri, Nov 18, 2016 at 08:11:34PM +0530, Aneesh Kumar K.V wrote:
> > @@ -3287,6 +3290,17 @@ static int kvmppc_core_init_vm_hv(struct kvm *kvm)
> >  	kvm->arch.lpcr = lpcr;
> >  
> >  	/*
> > +	 * Work out how many sets the TLB has, for the use of
> > +	 * the TLB invalidation loop in book3s_hv_rmhandlers.S.
> > +	 */
> > +	if (cpu_has_feature(CPU_FTR_ARCH_300))
> > +		kvm->arch.tlb_sets = 256;	/* POWER9 */
> > +	else if (cpu_has_feature(CPU_FTR_ARCH_207S))
> > +		kvm->arch.tlb_sets = 512;	/* POWER8 */
> > +	else
> > +		kvm->arch.tlb_sets = 128;	/* POWER7 */
> > +
> 
> We have 
> 
> #define POWER7_TLB_SETS		128	/* # sets in POWER7 TLB */
> #define POWER8_TLB_SETS		512	/* # sets in POWER8 TLB */
> #define POWER9_TLB_SETS_HASH	256	/* # sets in POWER9 TLB Hash mode */
> #define POWER9_TLB_SETS_RADIX	128	/* # sets in POWER9 TLB Radix mode */
> 
> May be use that instead of opencoding ?

Doing that would make it easier to check that we're using the same
values everywhere but harder to see what actual numbers we're
getting.  I guess I could use the symbols and put the values in the
comments.  In any case, in future these values are just going to be
default values if we can't find a suitable device-tree property.

Paul.