[PATCH v2] powerpc/mm/radix: Invalidate ERAT on tlbiel for POWER9 DD1
Michael Neuling
mikey at neuling.org
Wed Nov 16 16:23:19 AEDT 2016
On POWER9 DD1, when we do a local TLB invalidate we also need to explicitly
invalidate the ERAT.
Signed-off-by: Michael Neuling <mikey at neuling.org>
---
v2:
- Remove unnecessary isyncs
---
arch/powerpc/mm/tlb-radix.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c
index bda8c43be7..4a19cdd8a0 100644
--- a/arch/powerpc/mm/tlb-radix.c
+++ b/arch/powerpc/mm/tlb-radix.c
@@ -50,6 +50,9 @@ static inline void _tlbiel_pid(unsigned long pid, unsigned long ric)
for (set = 0; set < POWER9_TLB_SETS_RADIX ; set++) {
__tlbiel_pid(pid, set, ric);
}
+ if (cpu_has_feature(CPU_FTR_POWER9_DD1))
+ asm volatile(PPC_SLBIA(0x7)
+ : : :"memory");
return;
}
@@ -83,6 +86,9 @@ static inline void _tlbiel_va(unsigned long va, unsigned long pid,
asm volatile(PPC_TLBIEL(%0, %4, %3, %2, %1)
: : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory");
asm volatile("ptesync": : :"memory");
+ if (cpu_has_feature(CPU_FTR_POWER9_DD1))
+ asm volatile(PPC_SLBIA(0x7)
+ : : :"memory");
}
static inline void _tlbie_va(unsigned long va, unsigned long pid,
--
2.9.3
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