[PATCH] powerpc/64s: relocation, register save fixes for system reset interrupt

[Shreyas B. Prabhu]

On Thu, Nov 3, 2016 at 1:21 AM, Nicholas Piggin <npiggin at gmail.com> wrote:
> On Wed, 2 Nov 2016 14:15:48 +0530
> Gautham R Shenoy <ego at linux.vnet.ibm.com> wrote:
>
>> Hi Nick,
>>
>> On Wed, Nov 02, 2016 at 07:36:24PM +1100, Nicholas Piggin wrote:
>> >
>> > Okay, I'll work with that. What's the best way to make a P8 do
>> > winkle sleeps?
>>
>> From the userspace, offlining the CPUs of the core will put them to
>> winkle.
>
> Thanks for this. Hum, that r13 manipulation throughout the idle
> and exception code is a bit interesting. I'll do the minimal patch
> for 4.9, but what's the reason not to just use the winkle state
> in the PACA rather than storing it into HSPRG0 bit, can you (or
> Shreyas) explain?
>
Hi Nick,

Before deep winkle, checking SRR1's wakeup bits (Bits 46:47) was enough to
figure out which idle state we are waking up from. But in P8, SRR1's wakeup
bits aren't enough since bits 46:47 are 0b11 for both fast sleep and
deep winkle.
So to distinguish bw fastsleep and deep winkle, we use the current HSPRG0/PORE
trick. We program the PORE engine (which is used for state restore when waking
up from deep winkle) to restore HSPRG0 with the last bit set (we do this in
pnv_save_sprs_for_winkle()). R13 bit manipulation in pnv_restore_hyp_resource
is related to this.

Thanks,
Shreyas