arch/PPC:B4860qds/B4420qds: Updates to device trees for B4860 for DSP clusters and their L2 caches

[Scott Wood]

On Thu, Jan 28, 2016 at 06:47:39PM +0530, Ashish kumar wrote:
> B4860 has 1 PPC core cluster and 3 DSP core clusters.
> Similarly B4420 has 1 PPC core cluster and 1 DSP core cluster.
> 
> Each DSP core cluster consists of 2 SC3900 cores and a shared L2 cache.
> 
> Add DSP clusters for B4420
> The L2 cache nodes such that they now appear in only the
> soc specific dtsi files(b4860si-post.dtsi and b4420si-post.dtsi).
> 
> Signed-off-by: Ashish Kumar <Ashish.Kumar at nxp.com>
> Signed-off-by: Shaveta Leekha  <Shaveta.Leekha at nxp.com>

The subject line is way too long, and has a non-standard prefix.

It should be something like "powerpc/fsl: Add DSP clusters and their L2 nodes"

> +
> +	dsp-clusters {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		dsp-cluster0 {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			compatible = "fsl,sc3900-cluster";
> +			reg = <0>;
> +
> +			dsp0: dsp at 0 {
> +				compatible = "fsl,sc3900";
> +				reg = <0>;
> +				next-level-cache = <&L2_2>;
> +			};
> +			dsp1: dsp at 1 {
> +				compatible = "fsl,sc3900";
> +				reg = <1>;
> +				next-level-cache = <&L2_2>;
> +			};
> +		};
> +	};

Where is the binding for this stuff?

Why "dsp-cluster0" instead of "dsp-cluster at 0"?

-Scott