[PATCH 3/5] powerpc: tm: Always use fp_state and vr_state to store live registers
Cyril Bur
cyrilbur at gmail.com
Thu Jun 30 11:31:33 AEST 2016
On Tue, 28 Jun 2016 11:53:13 +0800
Simon Guo <simonguo at linux.vnet.ibm.com> wrote:
> hi Cyril,
>
> On Wed, Jun 08, 2016 at 02:00:34PM +1000, Cyril Bur wrote:
> > @@ -1108,11 +1084,11 @@ struct task_struct *__switch_to(struct task_struct *prev,
> > */
> > save_sprs(&prev->thread);
> >
> > - __switch_to_tm(prev);
> > -
> > /* Save FPU, Altivec, VSX and SPE state */
> > giveup_all(prev);
> >
> > + __switch_to_tm(prev);
> > +
>
Hi Simon,
> There should be a bug.
> giveup_all() will clear MSR[FP] bit.
> __switch_to_tm() reads that bit to decide whether the FP
> register needs to be flushed to thread_struct.
> === tm_reclaim() (invoked by __switch_to_tm)========================
> andi. r0, r4, MSR_FP
> beq dont_backup_fp
>
> addi r7, r3, THREAD_CKFPSTATE
> SAVE_32FPRS_VSRS(0, R6, R7) /* r6 scratch, r7 transact fp
> state */
>
> mffs fr0
> stfd fr0,FPSTATE_FPSCR(r7)
>
> dont_backup_fp:
> =============================
>
> But now the __switch_to_tm() is moved behind giveup_all().
> So __switch_to_tm() loses MSR[FP] and cannot decide whether saving ckpt FPU or not.
>
Good catch! Yes it looks that way indeed. I thought I had a test to catch this
because this is the big risk here but upon reflection it looks like I don't
(mostly because it seems a condition to catch that is hard to craft).
I'll add a test and a fix.
Thanks.
Cyril
> The same applies to VMX/VSX.
Yeah.
>
> Thanks,
> - Simon
>
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