[pasemi] problem with i2c-pasemi

[Christian Zigotzky]

Information about our I2C/SMBus busses:

     00:1c.0 SMBus: PA Semi, Inc PWRficient SMBus Controller (rev 01)
        Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- 
ParErr- Stepping- SERR- FastB2B- DisINTx-
        Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- 
<TAbort- <MAbort- >SERR- <PERR- INTx-
        Interrupt: pin A routed to IRQ 70
        Region 0: I/O ports at 7f0200 [size=64]

     00:1c.1 SMBus: PA Semi, Inc PWRficient SMBus Controller (rev 01)
        Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- 
ParErr- Stepping- SERR- FastB2B- DisINTx-
        Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- 
<TAbort- <MAbort- >SERR- <PERR- INTx-
        Interrupt: pin A routed to IRQ 71
        Region 0: I/O ports at 7f0240 [size=64]

     00:1c.2 SMBus: PA Semi, Inc PWRficient SMBus Controller (rev 01)
        Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- 
ParErr- Stepping- SERR- FastB2B- DisINTx-
        Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- 
<TAbort- <MAbort- >SERR- <PERR- INTx-
        Interrupt: pin A routed to IRQ 72
        Region 0: I/O ports at 7f0280 [size=64]

SMbus Controllers
The CPU provides 3 SMbus controllers, and these are used to connect up 
various SMbus and I2C devices. The number of SMbusses is expanded to 7 
via a 1:4 multiplexer on SMbus 1.

SMbus 0 is connected to the 4 DIMM sockets to support Serial Presence 
Detect (SPD). It is also connected to a standard 24LC128 EEPROM, and a 
temperature sensor (Texas Instruments TMP423). This sensor is connected 
to the CPU on-die temperature diodes for the 2 cores and SOC (main logic).

Cheers,

Christian


On 30 July 2016 at 8:20 PM, Wolfram Sang wrote:
>
> Which I2C busses do you have on your board and how are they described?
> Can you post that?
>
> Thanks,
>
>     Wolfram
>