t1040 IFC flash driver Extended Chip Select

Daniel Walker danielwa at cisco.com
Fri Jul 8 07:49:32 AEST 2016


On 07/07/2016 02:23 PM, Scott Wood wrote:
>
> I suspect that add the usage of cspr_ext into the driver would fix the
> issue we have. It reads like you would find that acceptable ?
> What specifically is the problem you're having?  Is it that CSPR_EXT is
> not getting written to, and thus the device does not appear at the
> address that it should?
>
> Or is the driver matching incorrectly?  The only way the driver's lack
> of using CSPR_EXT to match would be a problem would be if you have
> multiple chipselects with the same address in the lower 32 bits, and
> only CSPR_EXT distinguishing them.  Since you proposed a device tree
> binding that assumes all devices have the same CSPR_EXT, I doubt that's
> the case, so I doubt adding CSPR_EXT matching to the driver will solve
> your problem.
>
> -Scott
>

I didn't do the debug on this. From my perspective it's either flash 
works, or it doesn't work. We need the code below for it to work,


+#define IFC_REG_BASEADDR       0x124000
+
+static void rsp3_setup_ifc(void)
+{
+       /* set Extended Base Address for external flash chips */
+       void __iomem *ccsr_ifc;
+       ccsr_ifc = g_ccsrbp + IFC_REG_BASEADDR;
+       iowrite32be(0xF, (ccsr_ifc + 0x0C)); /* Extended Address */
+}
+

And this is our device tree blob,

+       ifc: localbus at ffb124000 {
+               #address-cells = <2>;
+               #size-cells = <1>;
+               compatible = "fsl,ifc", "simple-bus";
+               interrupts = <0x19 0x2 0x0 0x0>;
+               reg = <0xf 0xfb124000 0 0x2000>;
+               ranges = <0 0 0xf 0xfc000000 0x4000000>;
+
+               flash at 0,0 {
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       compatible = "cfi-flash";
+                       reg = <0x0 0x0 0x4000000>;
+
+                       bank-width = <2>;
+                       device-width = <1>;
+
+                       csl_s at 200000 {
+                               label = "csl_s";
+                               reg = <0x20000 0x200000>;
+                       };
+
+                       space_ava at 400000 {
+                               label ="Space Available";
+                               reg = <0x400000 0x2BA0000>;
+                       };
+
+                       nvram_backup at 35e0000 {
+                               label ="NVRAM Backup";
+                               reg = <0x35e0000 0x20000>;
+                       };
+
+                       upgrade at 3600000 {
+                               label ="Upgrade Boot Rom";
+                               reg = <0x3600000 0x200000>;
+                       };
+
+                       nvram at 3de0000 {
+                               label ="NVRAM";
+                               reg = <0x3de0000 0x20000>;
+                       };
+
+                       bootrom at 3e00000 {
+                               label ="Running Boot Rom";
+                               reg = <0x3e00000 0x200000>;
+                               read-only;
+                       };
+               };
+       };
+



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