[PATCH 02/14] cxl: Add cxl_slot_is_supported API

Andrew Donnellan andrew.donnellan at au1.ibm.com
Wed Jul 6 12:02:51 AEST 2016


On 04/07/16 23:22, Ian Munsie wrote:
> From: Ian Munsie <imunsie at au1.ibm.com>
>
> This extends the check that the adapter is in a CAPI capable slot so
> that it may be called by external users in the kernel API. This will be
> used by the upcoming Mellanox CX4 support, which needs to know ahead of
> time if the card can be switched to cxl mode so that it can leave it in
> PCI mode if it is not.
>
> This API takes a parameter to check if CAPP DMA mode is supported, which
> it currently only allows on P8NVL systems, since that mode currently has
> issues accessing memory < 4GB on P8, and we cannot realistically avoid
> that.
>
> This API does not currently check if a CAPP unit is available (i.e. not
> already assigned to another PHB) on P8. Doing so would be racy since it
> is assigned on a first come first serve basis, and so long as CAPP DMA
> mode is not supported on P8 we don't need this, since the only
> anticipated user of this API requires CAPP DMA mode.
>
> Cc: Philippe Bergheaud <felix at linux.vnet.ibm.com>
> Signed-off-by: Ian Munsie <imunsie at au1.ibm.com>

Reviewed-by: Andrew Donnellan <andrew.donnellan at au1.ibm.com>

> ---
>  drivers/misc/cxl/pci.c | 37 +++++++++++++++++++++++++++++++++++++
>  include/misc/cxl.h     | 15 +++++++++++++++
>  2 files changed, 52 insertions(+)
>
> diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
> index 3a5f980..9530280 100644
> --- a/drivers/misc/cxl/pci.c
> +++ b/drivers/misc/cxl/pci.c
> @@ -1426,6 +1426,43 @@ static int cxl_slot_is_switched(struct pci_dev *dev)
>  	return (depth > CXL_MAX_PCIEX_PARENT);
>  }
>
> +bool cxl_slot_is_supported(struct pci_dev *dev, int flags)
> +{
> +	if (!cpu_has_feature(CPU_FTR_HVMODE))
> +		return false;
> +
> +	if ((flags & CXL_SLOT_FLAG_DMA) && (!pvr_version_is(PVR_POWER8NVL))) {
> +		/*
> +		 * CAPP DMA mode is technically supported on regular P8, but
> +		 * will EEH if the card attempts to acccess memory < 4GB, which

access

> +		 * we cannot realistically avoid. We might be able to work
> +		 * around the issue, but until then return unsupported:
> +		 */
> +		return false;
> +	}
> +
> +	if (cxl_slot_is_switched(dev))
> +		return false;
> +
> +	/*
> +	 * XXX: This gets a little tricky on regular P8 (not POWER8NVL) since
> +	 * the CAPP can be connected to PHB 0, 1 or 2 on a first come first
> +	 * served basis, which is racy to check from here. If we need to
> +	 * support this in future we might need to consider having this
> +	 * function effectively reserve it ahead of time.
> +	 *
> +	 * Currently, the only user of this API is the Mellanox CX4, which is
> +	 * only supported on P8NVL due to the above mentioned limitation of
> +	 * CAPP DMA mode and therefore does not need to worry about thi. If the

this

-- 
Andrew Donnellan              OzLabs, ADL Canberra
andrew.donnellan at au1.ibm.com  IBM Australia Limited



More information about the Linuxppc-dev mailing list