[PATCH] cxl: Fix PSL timebase synchronization detection

[Michael Neuling]

On Wed, 2016-02-24 at 18:27 +0100, Frederic Barrat wrote:
> The PSL timebase synchronization is seemingly failing for
> configuration not including VIRT_CPU_ACCOUNTING_NATIVE. The driver
> shows the following trace in dmesg:
> PSL: Timebase sync: giving up!
> 
> The PSL timebase register is actually syncing correctly, but the cxl
> driver is not detecting it. Fix is to use the proper timebase-to-time
> conversion.
> 
> Signed-off-by: Frederic Barrat <fbarrat at linux.vnet.ibm.com>

Looks good!

Acked-by: Michael Neuling <mikey at neuling.org>


> Cc: <stable at vger.kernel.org> # 4.3+
> ---
>  drivers/misc/cxl/pci.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
> index 4c1903f..0c6c17a1 100644
> --- a/drivers/misc/cxl/pci.c
> +++ b/drivers/misc/cxl/pci.c
> @@ -415,7 +415,7 @@ static int cxl_setup_psl_timebase(struct cxl
> *adapter, struct pci_dev *dev)
>  		delta = mftb() - psl_tb;
>  		if (delta < 0)
>  			delta = -delta;
> -	} while (cputime_to_usecs(delta) > 16);
> +	} while (tb_to_ns(delta) > 16000);
>  
>  	return 0;
>  }