[v3,2/2] cxl: Configure the PSL for two CAPI ports on POWER8NVL

Michael Ellerman mpe at ellerman.id.au
Mon Apr 11 22:35:07 AEST 2016


On Thu, 2016-31-03 at 09:19:28 UTC, Philippe Bergheaud wrote:
> The POWER8NVL chip has two CAPI ports.  Configure the PSL to route
> data to the port corresponding to the CAPP unit.
> 
> Signed-off-by: Philippe Bergheaud <felix at linux.vnet.ibm.com>

Applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/aa14138a51ca42eada706d4b96

cheers


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