[PATCH V2 67/68] powerpc/mm/radix: Cputable update for radix
Aneesh Kumar K.V
aneesh.kumar at linux.vnet.ibm.com
Sat Apr 9 16:14:03 AEST 2016
With P9 Radix we need to do
* set UPRT = 1
* set different TLB set count
In this patch we delay the UPRT=1 to early mmu init. This help us to
keep the cpu table setup and restore cpu callback the same across
different MMU model.
This also implies that a cpu_restore cur_cpu_spec callback won't set
UPRT=1. We currently use that for secondary cpu init and on primary
after we did an opal reinit for endian switch. In both the case
we call early_mmu_init after the above operations. This set UPRT
to correct value.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar at linux.vnet.ibm.com>
---
arch/powerpc/include/asm/reg.h | 4 ++++
arch/powerpc/kernel/cputable.c | 2 +-
arch/powerpc/kernel/mce_power.c | 3 ++-
arch/powerpc/mm/pgtable-radix.c | 13 +++++++++++++
4 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index b546e6f28d44..3400ed884f10 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -347,6 +347,10 @@
#define LPCR_LPES_SH 2
#define LPCR_RMI 0x00000002 /* real mode is cache inhibit */
#define LPCR_HDICE 0x00000001 /* Hyp Decr enable (HV,PR,EE) */
+/*
+ * Used in asm code, hence we don't want to use PPC_BITCOUNT
+ */
+#define LPCR_UPRT (ASM_CONST(0x1) << 22)
#ifndef SPRN_LPID
#define SPRN_LPID 0x13F /* Logical Partition Identifier */
#endif
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 6c662b8de90d..e009722d5914 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -514,7 +514,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
.cpu_features = CPU_FTRS_POWER9,
.cpu_user_features = COMMON_USER_POWER9,
.cpu_user_features2 = COMMON_USER2_POWER9,
- .mmu_features = MMU_FTRS_POWER9,
+ .mmu_features = MMU_FTRS_POWER9 | MMU_FTR_RADIX,
.icache_bsize = 128,
.dcache_bsize = 128,
.num_pmcs = 6,
diff --git a/arch/powerpc/kernel/mce_power.c b/arch/powerpc/kernel/mce_power.c
index 92a66a2a9b85..4a8c3bdfce5c 100644
--- a/arch/powerpc/kernel/mce_power.c
+++ b/arch/powerpc/kernel/mce_power.c
@@ -72,10 +72,11 @@ void __flush_tlb_power8(unsigned int action)
void __flush_tlb_power9(unsigned int action)
{
+ if (radix_enabled())
+ flush_tlb_206(POWER9_TLB_SETS_RADIX, action);
flush_tlb_206(POWER9_TLB_SETS_HASH, action);
}
-
/* flush SLBs and reload */
#ifdef CONFIG_PPC_MMU_STD_64
static void flush_and_reload_slb(void)
diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c
index be95d1ef35a0..89a4ee26b879 100644
--- a/arch/powerpc/mm/pgtable-radix.c
+++ b/arch/powerpc/mm/pgtable-radix.c
@@ -296,6 +296,13 @@ found:
void __init rearly_init_mmu(void)
{
+ unsigned long lpcr;
+ /*
+ * setup LPCR UPRT based on mmu_features
+ */
+ lpcr = mfspr(SPRN_LPCR);
+ mtspr(SPRN_LPCR, lpcr | LPCR_UPRT);
+
#ifdef CONFIG_PPC_64K_PAGES
/* PAGE_SIZE mappings */
mmu_virtual_psize = MMU_PAGE_64K;
@@ -345,6 +352,12 @@ void __init rearly_init_mmu(void)
void rearly_init_mmu_secondary(void)
{
+ unsigned long lpcr;
+ /*
+ * setup LPCR UPRT based on mmu_features
+ */
+ lpcr = mfspr(SPRN_LPCR);
+ mtspr(SPRN_LPCR, lpcr | LPCR_UPRT);
/*
* update partition table control register, 64 K size.
*/
--
2.5.0
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