[PATCH v2 08/25] powerpc/8xx: Map IMMR area with 512k page at a fixed address

David Laight David.Laight at ACULAB.COM
Thu Sep 24 21:41:25 AEST 2015

From: Christophe Leroy
> Sent: 22 September 2015 17:51
> Traditionaly, each driver manages one computer board which has its
> own components with its own memory maps.
> But on embedded chips like the MPC8xx, the SOC has all registers
> located in the same IO area.
> When looking at ioremaps done during startup, we see that
> many drivers are re-mapping small parts of the IMMR for their own use
> and all those small pieces gets their own 4k page, amplifying the
> number of TLB misses: in our system we get 0xff000000 mapped 31 times
> and 0xff003000 mapped 9 times.

Isn't this a more general problem?

If there are multiple remap requests for the same physical page
shouldn't the kernel be just increasing a reference count somewhere
and returning address in the same virtual page?
This should probably happen regardless of the address.
I presume it must be done for cacheable mappings.

Whether things like the IMMR should be mapped with a larger TLB
is a separate matter.


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