[PATCH] nx-842: Ignore bit 3 of condition register returned by icswx

Ram Pai linuxram at us.ibm.com
Sat Oct 31 09:31:20 AEDT 2015


icswx occasionally under heavy load sets bit 3 of condition register 0.
It has no software implication.

Currently that bit is interpreted by the driver as a failure, when
it should have calmly ignored it.

Signed-off-by: Ram Pai <linuxram at us.ibm.com>
---
 arch/powerpc/include/asm/icswx.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/include/asm/icswx.h b/arch/powerpc/include/asm/icswx.h
index 9f8402b..bce20c7 100644
--- a/arch/powerpc/include/asm/icswx.h
+++ b/arch/powerpc/include/asm/icswx.h
@@ -177,7 +177,7 @@ static inline int icswx(__be32 ccw, struct coprocessor_request_block *crb)
 	: "r" (ccw_reg), "r" (crb)
 	: "cr0", "memory");
 
-	return (int)((cr >> 28) & 0xf);
+	return (int)((cr >> 28) & 0xe);
 }



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