[RFC PATCH 0/7] Remove 4k subpage tracking with hash 64K config
Aneesh Kumar K.V
aneesh.kumar at linux.vnet.ibm.com
Wed Oct 21 07:12:26 AEDT 2015
Hi,
This patch series is on top of the series posted at
https://lists.ozlabs.org/pipermail/linuxppc-dev/2015-October/135299.html
"[PATCH V4 00/31] powerpc/mm: Update page table format for book3s 64". In this
series we remove 4k subpage tracking with 64K config. Instead we do a hash
table lookup to get the slot information of 4k hash ptes. This also allow us
to remove real_pte_t. Side effect of the change is that a specific 4k slot
lookup can result in multiple H_READ hcalls. But that should only impact
when we are using 4K subpages which should be rare.
NOTE: I only tested this on systemsim. Wanted to get this out to get early
feedback.
Aneesh Kumar K.V (7):
powerpc/mm: Don't hardcode page table size
powerpc/mm: Don't hardcode the hash pte slot shift
powerpc/nohash: Update 64K nohash config to have 32 pte fragement
powerpc/mm: Don't track 4k subpage information with 64k linux page
size
powerpc/mm: update frag size
powerpc/mm: Update pte_iterate_hashed_subpaes args
powerpc/mm: getrid of real_pte_t
arch/powerpc/include/asm/book3s/64/hash-64k.h | 75 +++++++++---------------
arch/powerpc/include/asm/book3s/64/pgtable.h | 25 +++-----
arch/powerpc/include/asm/machdep.h | 2 +
arch/powerpc/include/asm/nohash/64/pgtable-64k.h | 21 +++++--
arch/powerpc/include/asm/nohash/64/pgtable.h | 24 +++-----
arch/powerpc/include/asm/page.h | 15 -----
arch/powerpc/include/asm/pgalloc-64.h | 10 ----
arch/powerpc/include/asm/tlbflush.h | 4 +-
arch/powerpc/mm/hash64_64k.c | 67 +++++++++++++--------
arch/powerpc/mm/hash_native_64.c | 35 ++++++++---
arch/powerpc/mm/hash_utils_64.c | 13 ++--
arch/powerpc/mm/init_64.c | 7 +--
arch/powerpc/mm/pgtable_64.c | 6 +-
arch/powerpc/mm/tlb_hash64.c | 15 +++--
arch/powerpc/platforms/pseries/lpar.c | 23 ++++++--
15 files changed, 175 insertions(+), 167 deletions(-)
--
2.5.0
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