[1/4] powerpc/fsl-booke: Add device tree support for T1024/T1023 SoC

[Scott Wood]

On Mon, 2015-03-30 at 06:08 -0500, Liu Shengzhou-B36685 wrote:
> > -----Original Message-----
> > From: Wood Scott-B07421
> > Sent: Friday, January 30, 2015 9:20 AM
> > To: Liu Shengzhou-B36685
> > Cc: linuxppc-dev at lists.ozlabs.org
> > Subject: Re: [1/4] powerpc/fsl-booke: Add device tree support for
> > T1024/T1023 SoC
> > 
> > On Thu, Jan 29, 2015 at 03:52:24PM +0800, Shengzhou Liu wrote:
> > > +	corenet-cf at 18000 {
> > > +		compatible = "fsl,corenet2-cf";
> > 
> > While the damage has already been done by the t1040 device tree, this is
> > not 100% compatible with what's on t4240.  I'm not sure if it's worth
> > doing anything about it at this point, given that you can tell the
> > difference by the version register even though that register is reserved
> > on t4240 and simliar chips, which is what I do in
> > http://patchwork.ozlabs.org/patch/419911/
> 
> Now here "fsl,corenet2-cf" is suitable for t1024 after your t1040 patch was merged.
> T1024 and t1040 have the same version of ccf.

I wouldn't call it "suitable", just that there's a workaround for
existing badness.

> > > +/include/ "t1023si-post.dtsi"
> > > +&soc {
> > > +	display:display at 180000 {
> > > +		compatible = "fsl,t1024-diu", "fsl,diu";
> > > +		reg = <0x180000 1000>;
> > > +		interrupts = <74 2 0 0>;
> > > +	};
> > > +};
> > 
> > There are other differences between t1023 an t1024.  Where do you
> > describe t1024's QE?  Where do you describe the DDR and IFC differences?
> > can they be detected at runtime?  t1024 supports deep sleep, but t1023
> > doesn't -- yet you label both chips as having t1024 rcpm.
> > 
> As QE IP block has not been upstream yet,

Huh?

arch/powerpc/sysdev/qe_lib/

>  so have to removed QE info in dts currently(same on t1040), 

That's not how it works.

> DDR and IFC differences are in u-boot, not in dts.

The differences are in hardware, which is what the dts is supposed to
describe.

> Both t1023 and t1024 support sleep, so label both chips as having t1024 rcpm.

That's not how it works.

> Only t1024 has deep sleep, the difference is identified in *.c not in dts (confirmed with deep sleep owner). 

Even if the C code chooses to use SVR to identify the difference (why?),
that doesn't mean it's OK for the device tree to contain wrong
information.

-Scott