[PATCH 1/3] powerpc/dts: Add TDM device tree nodes for P1021RDB

[Scott Wood]

On Thu, 2015-03-26 at 17:14 +0800, ying.zhang at freescale.com wrote:
> From: Ying Zhang <b40530 at freescale.com>
> 
> The dts file support QE-TDM function and PQ-MDS-T1 card for P1021RDB.
> PQ-MDS-T1 is connected to the board by PMC, there is a zarlink le88266
> on the card, we configure it by QE-SPI. Because PMC has a shared CS pin
> with L2switch, so we do the device tree fixup in uboot.
> 
> Change-Id: I7ecee0d93a105ef158455238fb003a2ad2ca32e7
> Signed-off-by: Ying Zhang <b40530 at freescale.com>
> Signed-off-by: Xie Xiaobo <X.Xie at freescale.com>
> Reviewed-on: http://git.am.freescale.net:8181/900
> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING at freescale.com>
> Tested-by: Fleming Andrew-AFLEMING <AFLEMING at freescale.com>
> ---
>  arch/powerpc/boot/dts/p1021rdb-pc_32b.dts | 191 +++++++++++++++++++++++++++++-
>  1 file changed, 187 insertions(+), 4 deletions(-)

Where is the device tree binding?


> +		pq_mds_t1: tdmphy at 2,0 {
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			reg = <2 0 0x10000>;
> +			ranges = <0 2 0 0x10000>;
> +			compatible = "fsl,pq-mds-t1";

MDS?

> +		spi at 4c0 {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			compatible = "fsl,mpc8569-qe-spi", "fsl,spi";

mpc8569?

> +			reg = <0x4c0 0x40>;
> +			cell-index = <0>;
> +			interrupts = <2>;
> +			interrupt-parent = <&qeic>;
> +			pio-handle = <&pio_qe_spi>;
> +			gpios = <&qe_pio_b 29 0>;
> +			mode = "cpu-qe";
> +
> +			legerity at 0 {
> +				compatible = "zarlink,le88266";
> +				reg = <0>;
> +				spi-max-frequency = <8000000>;
> +			};

What does "legerity" mean in this context?  Node names are supposed to
be generic, not product names, and certainly not (former) company names.

-Scott