[PATCH 1/3] powerpc/mpc85xx: Add FMan clock nodes

[Scott Wood]

On Thu, 2015-02-26 at 09:26 -0600, Emil Medve wrote:
> From: Igal Liberman <Igal.Liberman at freescale.com>
> 
> Signed-off-by: Igal Liberman <Igal.Liberman at freescale.com>
> ---
>  arch/powerpc/boot/dts/fsl/b4si-post.dtsi    | 11 +++++++++++
>  arch/powerpc/boot/dts/fsl/p2041si-post.dtsi |  8 ++++++++
>  arch/powerpc/boot/dts/fsl/p3041si-post.dtsi |  8 ++++++++
>  arch/powerpc/boot/dts/fsl/p4080si-post.dtsi | 16 ++++++++++++++++
>  arch/powerpc/boot/dts/fsl/p5020si-post.dtsi | 13 +++++++++++++
>  arch/powerpc/boot/dts/fsl/p5040si-post.dtsi | 26 ++++++++++++++++++++++++++
>  arch/powerpc/boot/dts/fsl/t1040si-post.dtsi |  8 ++++++++
>  arch/powerpc/boot/dts/fsl/t2081si-post.dtsi | 11 +++++++++++
>  arch/powerpc/boot/dts/fsl/t4240si-post.dtsi | 20 ++++++++++++++++++++
>  9 files changed, 121 insertions(+)
> 
> diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> index f8c325e..38621ef 100644
> --- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> @@ -395,6 +395,17 @@
>  		reg = <0xe0000 0xe00>;
>  		fsl,has-rstcr;
>  		fsl,liodn-bits = <12>;
> +
> +		fm0clk: fm0-clk-mux {
> +			#clock-cells = <0>;
> +			compatible = "fsl,fman-clk-mux";
> +			clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>, <&pll0 3>,
> +				 <&platform_pll 0>, <&pll1 1>, <&pll1 2>;
> +			clock-names = "pll0", "pll0-div2", "pll0-div3",
> +				      "pll0-div4", "platform-pll", "pll1-div2",
> +				      "pll1-div3";
> +			clock-output-names = "fm0-clk";
> +		};

Where's the binding for fsl,fman-clk-mux?

-Scott