[PATCH] powerpc/dts: Update the core cluster PLL node(s)

[Igal.Liberman]

From: Igal Liberman <Igal.Liberman at freescale.com>

This patch replaces the following:
	https://patchwork.ozlabs.org/patch/427664/

This patch is described by the following binding document update:
	https://patchwork.ozlabs.org/patch/461150/

Signed-off-by: Igal Liberman <Igal.Liberman at freescale.com>
---
 arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi |    6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi
index 48e0b6e..7e1f074 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi
@@ -49,14 +49,16 @@ global-utilities at e1000 {
 		reg = <0x800 0x4>;
 		compatible = "fsl,qoriq-core-pll-2.0";
 		clocks = <&sysclk>;
-		clock-output-names = "pll0", "pll0-div2", "pll0-div4";
+		clock-output-names = "pll0", "pll0-div2", "pll0-div3",
+				      "pll0-div4";
 	};
 	pll1: pll1 at 820 {
 		#clock-cells = <1>;
 		reg = <0x820 0x4>;
 		compatible = "fsl,qoriq-core-pll-2.0";
 		clocks = <&sysclk>;
-		clock-output-names = "pll1", "pll1-div2", "pll1-div4";
+		clock-output-names = "pll1", "pll1-div2", "pll1-div3",
+				      "pll1-div4";
 	};
 	platform_pll: platform-pll at c00 {
 		#clock-cells = <1>;
-- 
1.7.9.5