[PATCH] dt/bindings: qoriq-clock: Add binding for FMan clock mux

[Scott Wood]

On Tue, 2015-04-07 at 07:08 +0300, Igal.Liberman wrote:
> From: Igal Liberman <Igal.Liberman at freescale.com>
> 
> Signed-off-by: Igal Liberman <Igal.Liberman at freescale.com>
> ---
>  .../devicetree/bindings/clock/qoriq-clock.txt      |   59 ++++++++++++++++++++
>  1 file changed, 59 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> index df4a259..a7e84ce 100644
> --- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> +++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> @@ -65,6 +65,7 @@ Required properties:
>  		It takes parent's clock-frequency as its clock.
>  	* "fsl,qoriq-platform-pll-1.0" for the platform PLL clock (v1.0)
>  	* "fsl,qoriq-platform-pll-2.0" for the platform PLL clock (v2.0)
> +	* "fsl,fman-clk-mux" for the Frame Manager clock.

Is there any versioning required on this?

>  - #clock-cells: From common clock binding. The number of cells in a
>  	clock-specifier. Should be <0> for "fsl,qoriq-sysclk-[1,2].0"
>  	clocks, or <1> for "fsl,qoriq-core-pll-[1,2].0" clocks.
> @@ -73,6 +74,52 @@ Required properties:
>  	* 0 - equal to the PLL frequency
>  	* 1 - equal to the PLL frequency divided by 2
>  	* 2 - equal to the PLL frequency divided by 4
> +	For "fsl,fman-clk-mux" clocks, the single clock-specifier cell may
> +	take values according the Reset Configuration Word of the specific
> +	device:

fsl,fman-clk-mux nodes have #clock-cells of zero, so I don't understand
this section.

If this is meant to refer to the clock specifier that fsl,fman-clk-mux
nodes use in their input clocks, that is determined by the clock
provider and not the clock consumer.  

-Scott