[PATCH V4] POWERPC: BOOK3S: KVM: Use the saved dar value and generic make_dsisr

Olof Johansson olofj at google.com
Tue May 6 01:06:48 EST 2014

2014-05-05 8:03 GMT-07:00 Aneesh Kumar K.V <aneesh.kumar at linux.vnet.ibm.com>:
> Olof Johansson <olofj at google.com> writes:
>> 2014-05-05 7:43 GMT-07:00 Alexander Graf <agraf at suse.de>:
>>> On 05/05/2014 04:26 PM, Aneesh Kumar K.V wrote:
>>>> Alexander Graf <agraf at suse.de> writes:
>>>>  On 05/04/2014 07:21 PM, Aneesh Kumar K.V wrote:
>>>>>> Although it's optional IBM POWER cpus always had DAR value set on
>>>>>> alignment interrupt. So don't try to compute these values.
>>>>>> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar at linux.vnet.ibm.com>
>>>>>> ---
>>>>>> Changes from V3:
>>>>>> * Use make_dsisr instead of checking feature flag to decide whether to
>>>>>> use
>>>>>>     saved dsisr or not
>>>>>>  ....
>>>>     ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst)
>>>>>>    {
>>>>>> +#ifdef CONFIG_PPC_BOOK3S_64
>>>>>> +       return vcpu->arch.fault_dar;
>>>>> How about PA6T and G5s?
>>>>>  Paul mentioned that BOOK3S always had DAR value set on alignment
>>>> interrupt. And the patch is to enable/collect correct DAR value when
>>>> running with Little Endian PR guest. Now to limit the impact and to
>>>> enable Little Endian PR guest, I ended up doing the conditional code
>>>> only for book3s 64 for which we know for sure that we set DAR value.
>>> Yes, and I'm asking whether we know that this statement holds true for
>>> PA6T and G5 chips which I wouldn't consider IBM POWER. Since the G5 is at
>>> least developed by IBM, I'd assume its semantics here are similar to
>>> POWER4, but for PA6T I wouldn't be so sure.
>> Thanks for looking out for us, obviously IBM doesn't (based on the reply a
>> minute ago).
> The reason I deferred the question to Paul is really because I don't
> know enough about PA6T and G5 to comment. I intentionally restricted the
> changes to BOOK3S_64 because I wanted to make sure I don't break
> anything else. It is in no way to hint that others don't care.

Ah, I see -- the disconnect is that you don't think PA6T and 970 are
64-bit book3s CPUs. They are.


More information about the Linuxppc-dev mailing list