[PATCH v2 4/4] KVM: PPC: Bookehv: Get vcpu's last instruction for emulation

Scott Wood scottwood at freescale.com
Sat May 3 01:32:39 EST 2014

On Fri, 2014-05-02 at 13:10 +0200, Alexander Graf wrote:
> On 05/02/2014 12:12 PM, David Laight wrote:
> > You also probably want the page mapped uncached - no point polluting the data
> > cache.

We can't do that without creating an architecturally illegal alias
between cacheable and non-cacheable mappings.

> Do e500 chips have a shared I/D cache somewhere?

Yes.  Only L1 is separate.


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