[PATCH] KVM: PPC: e500mc: Relax tlb invalidation condition on vcpu schedule

[Scott Wood]

On Thu, 2014-06-12 at 19:04 +0200, Alexander Graf wrote:
> On 06/12/2014 04:00 PM, Mihai Caraman wrote:
> > @@ -140,12 +142,24 @@ static void kvmppc_core_vcpu_load_e500mc(struct kvm_vcpu *vcpu, int cpu)
> >   	mtspr(SPRN_GDEAR, vcpu->arch.shared->dar);
> >   	mtspr(SPRN_GESR, vcpu->arch.shared->esr);
> >   
> > -	if (vcpu->arch.oldpir != mfspr(SPRN_PIR) ||
> > -	    __get_cpu_var(last_vcpu_on_cpu) != vcpu) {
> > -		kvmppc_e500_tlbil_all(vcpu_e500);
> > +	if (vcpu->arch.oldpir != mfspr(SPRN_PIR)) {
> > +		/* tlb entries deprecated */
> > +		inval_tlb = update_last = true;
> > +	} else if (__get_cpu_var(last_vcpu_on_cpu) != vcpu) {
> > +		update_last = true;
> > +		/* tlb entries polluted */
> > +		inval_tlb = __get_cpu_var(last_lpid_on_cpu) ==
> > +			    vcpu->kvm->arch.lpid;
> > +	}

What about the following sequence on one CPU:

LPID 1, vcpu A
LPID 2, vcpu C
LPID 1, vcpu B
LPID 2, vcpu C	doesn't invalidate
LPID 1, vcpu A  doesn't invalidate

In the last line, vcpu A last ran on this cpu (oldpir matches), but LPID
2 last ran on this cpu (last_lpid_on_cpu does not match) -- but an
invalidation has never happened since vcpu B from LPID 1 ran on this
cpu.

-Scott