[PATCH] DMA: Freescale: change BWC from 256 bytes to 1024 bytes
vinod.koul at intel.com
Mon Jan 20 18:43:49 EST 2014
On Thu, Jan 16, 2014 at 02:10:53PM +0800, hongbo.zhang at freescale.com wrote:
> From: Hongbo Zhang <hongbo.zhang at freescale.com>
> Freescale DMA has a feature of BandWidth Control (ab. BWC), which is currently
> 256 bytes and should be changed to 1024 bytes for best DMA throughput.
> Changing BWC from 256 to 1024 will improve DMA performance much, in cases
> whatever one channel is running or multi channels are running simultanously,
> large or small buffers are copied. And this change doesn't impact memory
> access performance remarkably, lmbench tests show that for some cases the
> memory performance are decreased very slightly, while the others are even
> Tested on T4240.
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