[PATCH v9] clk: corenet: Adds the clock binding
Scott Wood
scottwood at freescale.com
Sat Jan 18 12:06:27 EST 2014
On Mon, 2014-01-13 at 16:16 +0800, Tang Yuantian wrote:
> +Example for clock block and clock provider:
> +/ {
> + clockgen: global-utilities at e1000 {
> + compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0";
> + ranges = <0x0 0xe1000 0x1000>;
> + clock-frequency = 133333;
Missing <> around 133333, and the actual p5020ds input clock (based on
observing what U-Boot fills in) is 133333333, not 133333.
I'll fix when applying.
-Scott
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