[PATCH] powerpc/pci: Fix IMMRBAR address

Kumar Gala galak at kernel.crashing.org
Sat Jan 18 04:06:04 EST 2014


On Jan 16, 2014, at 2:14 AM, Minghuan Lian <Minghuan.Lian at freescale.com> wrote:

> For PEXCSRBAR, bit 3-0 indicate prefetchable and address type.
> So when getting base address, these bits should be masked,
> otherwise we may get incorrect base address.
> 
> Signed-off-by: Minghuan Lian <Minghuan.Lian at freescale.com>
> ---
> arch/powerpc/sysdev/fsl_pci.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
> 
> diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
> index 4dfd61d..44eae39 100644
> --- a/arch/powerpc/sysdev/fsl_pci.c
> +++ b/arch/powerpc/sysdev/fsl_pci.c
> @@ -868,6 +868,14 @@ u64 fsl_pci_immrbar_base(struct pci_controller *hose)
> 
> 		pci_bus_read_config_dword(hose->bus,
> 			PCI_DEVFN(0, 0), PCI_BASE_ADDRESS_0, &base);
> +
> +		/*
> +		 * For PEXCSRBAR, bit 3-0 indicate prefetchable and
> +		 * address type. So when getting base address, these
> +		 * bits should be masked
> +		 */
> +		base &= 0xfffffff0;
> +

base & PCI_BASE_ADDRESS_MEM_MASK

> 		return base;
> 	}
> #endif
> -- 
> 1.8.1.2
> 
> 
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