[RESEND] clk: ppc-corenet: Add Freescale ARM-based platforms CLK_OF_DECLARE support
Scott Wood
scottwood at freescale.com
Wed Aug 27 08:51:03 EST 2014
On Fri, 2014-08-22 at 17:34 +0800, Jingchang Lu wrote:
> Signed-off-by: Jingchang Lu <jingchang.lu at freescale.com>
> ---
> drivers/clk/Kconfig | 7 ++++---
> drivers/clk/clk-ppc-corenet.c | 5 +++++
> 2 files changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
> index cfd3af7..8784704 100644
> --- a/drivers/clk/Kconfig
> +++ b/drivers/clk/Kconfig
> @@ -82,11 +82,12 @@ config COMMON_CLK_AXI_CLKGEN
> FPGAs. It is commonly used in Analog Devices' reference designs.
>
> config CLK_PPC_CORENET
> - bool "Clock driver for PowerPC corenet platforms"
> - depends on PPC_E500MC && OF
> + bool "Clock driver for PowerPC corenet and compatible ARM-based platforms"
> + depends on (PPC_E500MC || ARM) && OF
Should the symbol and driver be renamed to something like CLK_FSL_QORIQ?
> diff --git a/drivers/clk/clk-ppc-corenet.c b/drivers/clk/clk-ppc-corenet.c
> index 8e58edf..7692cac 100644
> --- a/drivers/clk/clk-ppc-corenet.c
> +++ b/drivers/clk/clk-ppc-corenet.c
> @@ -305,3 +305,8 @@ static int __init ppc_corenet_clk_init(void)
> return platform_driver_register(&ppc_corenet_clk_driver);
> }
> subsys_initcall(ppc_corenet_clk_init);
> +
> +CLK_OF_DECLARE(ppc_core_pll_v1, "fsl,qoriq-core-pll-1.0", core_pll_init);
> +CLK_OF_DECLARE(ppc_core_pll_v2, "fsl,qoriq-core-pll-2.0", core_pll_init);
> +CLK_OF_DECLARE(ppc_core_mux_v1, "fsl,qoriq-core-mux-1.0", core_mux_init);
> +CLK_OF_DECLARE(ppc_core_mux_v2, "fsl,qoriq-core-mux-2.0", core_mux_init);
What does this do that the existing platform driver and match table
don't? Why is it needed for ARM when PPC didn't need it?
-Scott
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