[PATCH] ppc: bpf_jit: support MOD operation

[Vladimir Murzin]

On Thu, Sep 12, 2013 at 02:18:37AM +0100, Matt Evans wrote:
> Hi Ben, Vladimir,
> 
> 
> *dusts off very thick PPC cobwebs*  Sorry for the delay as I'm travelling, didn't get to this until now.
> 
> On 02/09/2013, at 9:45 PM, Benjamin Herrenschmidt wrote:
> 
> > On Mon, 2013-09-02 at 19:48 +0200, Vladimir Murzin wrote:
> >> Ping
> >> 
> >> On Wed, Aug 28, 2013 at 02:49:52AM +0400, Vladimir Murzin wrote:
> >>> commit b6069a9570 (filter: add MOD operation) added generic
> >>> support for modulus operation in BPF.
> >>> 
> > Sorry, nobody got a chance to review that yet. Unfortunately Matt
> > doesn't work for us anymore and none of us has experience with the
> > BPF code, so somebody (possibly me) will need to spend a bit of time
> > figuring it out before verifying that is correct.
> > 
> > Do you have a test case/suite by any chance ?
> > 
> > Ben.
> > 
> >>> This patch brings JIT support for PPC64
> >>> 
> >>> Signed-off-by: Vladimir Murzin <murzin.v at gmail.com>
> >>> ---
> >>> arch/powerpc/net/bpf_jit_comp.c | 22 ++++++++++++++++++++++
> >>> 1 file changed, 22 insertions(+)
> >>> 
> >>> diff --git a/arch/powerpc/net/bpf_jit_comp.c b/arch/powerpc/net/bpf_jit_comp.c
> >>> index bf56e33..96f24dc 100644
> >>> --- a/arch/powerpc/net/bpf_jit_comp.c
> >>> +++ b/arch/powerpc/net/bpf_jit_comp.c
> >>> @@ -193,6 +193,28 @@ static int bpf_jit_build_body(struct sk_filter *fp, u32 *image,
> >>> 				PPC_MUL(r_A, r_A, r_scratch1);
> >>> 			}
> >>> 			break;
> >>> +		case BPF_S_ALU_MOD_X: /* A %= X; */
> >>> +			ctx->seen |= SEEN_XREG;
> >>> +			PPC_CMPWI(r_X, 0);
> >>> +			if (ctx->pc_ret0 != -1) {
> >>> +				PPC_BCC(COND_EQ, addrs[ctx->pc_ret0]);
> >>> +			} else {
> >>> +				PPC_BCC_SHORT(COND_NE, (ctx->idx*4)+12);
> >>> +				PPC_LI(r_ret, 0);
> >>> +				PPC_JMP(exit_addr);
> >>> +			}
> >>> +			PPC_DIVWU(r_scratch1, r_A, r_X);
> >>> +			PPC_MUL(r_scratch1, r_X, r_scratch1);
> >>> +			PPC_SUB(r_A, r_A, r_scratch1);
> >>> +			break;
> 
> Without having compiled & tested this, it looks fine to me (especially with the corrected DIVWU opcode in the other patch, oops...).
> 
> >>> +		case BPF_S_ALU_MOD_K: /* A %= K; */
> >>> +#define r_scratch2 (r_scratch1 + 1)
> >>> +			PPC_LI32(r_scratch2, K);
> >>> +			PPC_DIVWU(r_scratch1, r_A, r_scratch2);
> >>> +			PPC_MUL(r_scratch1, r_scratch2, r_scratch1);
> >>> +			PPC_SUB(r_A, r_A, r_scratch1);
> >>> +#undef r_scratch2
> >>> +			break;
> 
> If you need another scratch register, it should really be defined in bpf_jit.h instead.
> 
> Once you define r_scratch2 in there,
> 
> Acked-by: Matt Evans <matt at ozlabs.org>
> 
> 
> Thanks!
> 
> 
> Matt
> 

Thanks!

Vladimir

> 
> 
> 
> >>> 		case BPF_S_ALU_DIV_X: /* A /= X; */
> >>> 			ctx->seen |= SEEN_XREG;
> >>> 			PPC_CMPWI(r_X, 0);
> >>> -- 
> >>> 1.8.1.5
> >>> 
> > 
>