[4/4] powerpc/mpc8548: Add workaround for erratum NMG_SRIO135

[Zhao Chenhui-B35336]

OK. I will do.

-Chenhui

________________________________________
From: Wood Scott-B07421
Sent: Thursday, October 17, 2013 7:20
To: Zhao Chenhui-B35336
Cc: linuxppc-dev at lists.ozlabs.org
Subject: Re: [4/4] powerpc/mpc8548: Add workaround for erratum NMG_SRIO135

On Tue, Mar 06, 2012 at 05:10:56PM +0800, chenhui zhao wrote:
> From: chenhui zhao <chenhui.zhao at freescale.com>
>
> Issue:
> Applications using lwarx/stwcx instructions in the core to
> compete for a software lock or semaphore with a device on
> RapidIO using read atomic set, clr, inc, or dec in a similar
> manner may falsely result in both masters seeing the lock
> as "available". This could result in data corruption as
> both masters try to modify the same piece of data protected
> by the lock.
>
> Workaround:
> Set bits 13 and 29 of CCSR offset 0x01010 (EEBPCR register
> of the ECM) during initialization and leave them set
> indefinitely. This may slightly degrade overall system
> performance.
>
> Refer to SRIO39 in MPC8548 errata document.
>
> Signed-off-by: Gong Chen <g.chen at freescale.com>
> Signed-off-by: Zhao Chenhui <chenhui.zhao at freescale.com>
> Signed-off-by: Li Yang <leoli at freescale.com>
>
> ---
> arch/powerpc/sysdev/fsl_rio.c |   44 +++++++++++++++++++++++++++++++++++++++++
>  1 files changed, 44 insertions(+), 0 deletions(-)
[snip]
> @@ -358,6 +391,17 @@ int fsl_rio_setup(struct platform_device *dev)
>                               dev->dev.of_node->full_name);
>               return -EFAULT;
>       }
> +
> +     /* Fix erratum NMG_SRIO135 */
> +     if (fsl_svr_is(SVR_8548) || fsl_svr_is(SVR_8548_E)) {
> +             rc = fixup_erratum_srio135(&dev->dev);
> +             if (rc) {
> +                     dev_err(&dev->dev,
> +                             "Failed to fix the erratum NMG_SRIO135.");
> +                     return rc;
> +             }
> +     }

This needs to be respun based on the current tree.

-Scott