Problem reading and programming memory location...

[neorf3k]

Hello Anatolij, this is our code, used at University, but again it doesn’t work…

How i told, the only information we have about that reg are:

Chip select 4 specification:
Lp_cs4
bus size: 8 bit
bus control: 2 wait state R/W ACK disabled
size allocated: 4 KByte

Our Register 8 bit LP_cs4 (we want to write)

cs4 offset: 0x001

The code we have used:

——
#define MBAR_BASE       0xF0000000
#define MALab_MM_START	 0x10020000U
#define MALab_MM_END	 0x10030000U
#define MALab_MM_SIZE	 0x00010000U

#define MALab_DEVICE_NAME	"MALab"

int init_module(void) { ...
    u16 cs4_start_value;
    u16 cs4_stop_value;
    u32 cs4_enable_value;
    u32 cs0_reg_value;
    u32 cs3_reg_value;
    u32 ipbi_cr_value;
    u32 cs_ctrl_reg_value;
    u8 rvoice_ioaddr_value;
    
    
    // reserve a page of memory for our hardware /proc/iomem
    if ( check_region(MALab_MM_START,MALab_MM_SIZE) ) {
        printk (KERN_ALERT "LED init_module: memory already in use\n");
        return -EBUSY;
    }
    
    request_region(MALab_MM_START,MALab_MM_SIZE,MALab_DEVICE_NAME);
    
    void __iomem *reg_base = ioremap(MBAR_BASE, 0x400);
    void __iomem *cs0_reg   = reg_base + 0x0300;
    void __iomem *cs1_reg   = reg_base + 0x0304;
    void __iomem *cs2_reg   = reg_base + 0x0308;
    void __iomem *cs3_reg   = reg_base + 0x030C;
    void __iomem *ipbi_cr = reg_base + 0x0054;
    void __iomem *cs4_start  = reg_base + 0x0024;
    void __iomem *cs4_stop   = reg_base + 0x0028;
    void __iomem *cs4_enable   = reg_base + 0x0310;
    void __iomem *cs_ctrl_reg   = reg_base + 0x0318;
    void __iomem *rvoice_ioaddr   = ioremap ((volatile unsigned long)(MALab_MM_START), MALab_MM_SIZE);
    
    printk(KERN_ALERT “r_ioaddr: 0x%08x\n", (u32)rvoice_ioaddr);
    
    //Chip Select 0/Boot Configuration Register: CE=0
    cs0_reg_value =in_be32(cs0_reg);
    out_be32(cs0_reg, (cs0_reg_value &= ~0x00010000));
    
    //Chip Select 3 Configuration Register: CE=0
    cs3_reg_value =in_be32(cs3_reg);
    out_be32(cs3_reg, (cs3_reg_value &= ~0x00010000));
    
    //enable LocalBus chip select CS4 to hit on our address range
    ipbi_cr_value=in_be32(ipbi_cr);
    out_be32(ipbi_cr, (ipbi_cr_value &= 0x00100001));
    out_be32(ipbi_cr, (ipbi_cr_value |= 0x00100001));
    out_be16(cs4_start+2, MALab_MM_START >>16);
    out_be16(cs4_stop+2, MALab_MM_END >>16);

    // LocalBus Chip Select 4 Configuration Register
    out_be32(cs4_enable, 0x0002DC00);
    
    //Enable Chip Select Control Register
    cs_ctrl_reg_value=in_be32(cs_ctrl_reg);
    out_be32(cs_ctrl_reg, (cs_ctrl_reg_value |= 0x01000000));
    
    //start solution A
    rvoice_ioaddr_value=in_8(rvoice_ioaddr);
    rvoice_ioaddr_value=0xAA;
    printk("A r_ioaddr_value---before : %x \n",in_8(rvoice_ioaddr));
    
    out_8(rvoice_ioaddr, rvoice_ioaddr_value);
    
    printk("A r_ioaddr_value---after : %x \n",in_8(rvoice_ioaddr));
    //end solution A
    
    //start solution B
    *(volatile u8 *)rvoice_ioaddr = 0xAA;
    printk("\n B r_ioaddr_value %x\n",*(volatile u8 *)rvoice_ioaddr);
    //end solution B

    
    ... }
——

the result is:

rvoice_ioaddr: 0xc9080000
A rvoice_ioaddr_value---before : 10 
A rvoice_ioaddr_value---after : 10 
B rvoice_ioaddr_value 10
——

we found some information on this post: http://linuxppc.10917.n7.nabble.com/MPC5200b-kernel-module-memory-mapping-td59862.html

Thanks again…

Lorenzo

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