Problem reading and programming memory location...

[neorf3k]

Hello again, I’ve tried this code, but we are not able to change cs4 reg value… what could be?

—

#define MALab_DEVICE_NAME	"MALab"
#define MPC5xxx_MM_CS4_START	(MBAR_BASE + 0x0024)
#define MPC5xxx_MM_CS4_STOP	(MBAR_BASE + 0x0028)
#define MPC5xxx_MM_IPBI	 (MBAR_BASE + 0x0054)

#define MALab_MM_START	 0x10020000U
#define MALab_MM_END	 0x10020FFFU
#define MALab_MM_SIZE	 0x00001000U

int init_module(void) { ...
    u16 cs4_start_value;
    u16 cs4_stop_value;
    u32 cs4_enable_value;
    
    u8 rvoice_ioaddr_value;

    
    // reserve a page of memory for our hardware /proc/iomem
    if ( check_region(MALab_MM_START,MALab_MM_SIZE) ) {
        printk (KERN_ALERT "LED init_module: memory already in use\n");
        return -EBUSY;
    }

    
    request_mem_region(MALab_MM_START,MALab_MM_SIZE,MALab_DEVICE_NAME);

    
    void __iomem *cs0_reg   = ioremap ((volatile unsigned long)(MBAR_BASE + 0x0300), 4);
    void __iomem *cs3_reg   = ioremap ((volatile unsigned long)(MBAR_BASE + 0x030C), 4);
    
    void __iomem *ipbi_cr = ioremap ((volatile unsigned long)(MPC5xxx_MM_IPBI), 4);
    void __iomem *cs4_start  = ioremap ((volatile unsigned long)(MPC5xxx_MM_CS4_START + 2), 2);
    void __iomem *cs4_stop   = ioremap ((volatile unsigned long)(MPC5xxx_MM_CS4_STOP + 2), 2);
    
    void __iomem *cs4_enable   = ioremap ((volatile unsigned long)(MBAR_BASE + 0x0310), 4);
    void __iomem *cs_ctrl_reg   = ioremap ((volatile unsigned long)(MBAR_BASE + 0x0318), 4);
    void __iomem *rvoice_ioaddr   = ioremap ((volatile unsigned long)(MALab_MM_START), MALab_MM_SIZE);
    
    //disable CSO

    out_be32(cs0_reg, 0x0004ed00);

    
    //disable CS3

    out_be32(cs3_reg, 0x0002cf00);

    // enable LocalBus chip select CS4
    out_be32(ipbi_cr, 0x00290001);

    cs4_start_value=in_be16(cs4_start);
    cs4_start_value=MALab_MM_START >>16;
    out_be16(cs4_start, cs4_start_value);
    cs4_stop_value=in_be16(cs4_stop);
    cs4_stop_value=MALab_MM_END >>16;
    out_be16(cs4_stop, cs4_stop_value);

    //enable CS4 and WSE
    out_be32(ipbi_cr, 0x00100001);

    // LocalBus Chip Select 4 Configuration Register
    out_be32(cs4_enable, 0x0002DC00);

    //Enable Chip Select Control Register
    out_be32(cs_ctrl_reg, 0x01000000);

    
    rvoice_ioaddr_value=in_8(rvoice_ioaddr);
    rvoice_ioaddr_value=0xAA;

    printk("rvoice_ioaddr_value---before : %x \n",in_8(rvoice_ioaddr));
    out_8(rvoice_ioaddr, rvoice_ioaddr_value);
    printk("rvoice_ioaddr_value---after : %x \n",in_8(rvoice_ioaddr));
    
    … }


——

Thank you

Lorenzo


On 14/nov/2013, at 10:09 AM, Anatolij Gustschin <agust at denx.de> wrote:

> Hi,
> 
> you mention the 0x1002000 as address, this is an address in SDRAM. In
> the previous email you mentioned 0x10020000 as the address. Please check
> what is passed to ioremap() as the first argument. Usually the mapping
> and the access to a 8-bit wide register would happen as follows:
> 
>   u8 regval;
> 
>   /* map 4kbyte reg. space */
>   virt_base = ioremap(0x10020000, 0x1000);
>   if (!virt_base) {
>     printk("fpga ioremap failed\n");
>     return;
>   }
> 
>   regval = in_8(virt_base);
> 
>   printk("reg. value 0x%02x\n", regval);
> 
> 
> 
> thanks,
> 
> Anatolij
> 
> 
> On Thu, 14 Nov 2013 09:38:35 +0100
> neorf3k <neorf3k at gmail.com> wrote:
> 
>> Thank you again…
>> we have checked, and the settings in Chip Select 4 Configuration, seems to be ok…
>> 
>> The strange thing is the return value from ioremap(). In U-Boot return value from address 0x1002000 is 0x45f80360… if we try to map it in our module, then we use ioremap(), return value is 0x10101010. So maybe the register address is mapped wrong… what could i fix it?
>> Then, after we have setted up the reg at 0x1002000 and we boot linux… the 0x1002000 doesn’t change its value… 
>> 
>> Thanks again…
>> 
>> Lorenzo
>> 
>> On 13/nov/2013, at 07:06 PM, Anatolij Gustschin <agust at denx.de> wrote:
>> 
>>> On Wed, 13 Nov 2013 14:48:24 +0100
>>> neorf3k <neorf3k at gmail.com> wrote:
>>> 
>>>> Yes, that is a device on the lpb via an fpga. We  have tried to configure
>>>> the chip select 4 configuration register at address MBAR + 0x0310, and it
>>>> seems to be ok. what do you mean with “chip select parameters”?
>>> 
>>> I meant the settings you can set up in the Chip Select 1–7 Configuration
>>> Registers, like address and data bus size, wait-states, etc.
>>> 
>>>> We have been able to edit it in U-BOOT, and the board (that chip) now works…
>>>> The strange thing, is that when we read in linux, at that address, we see
>>>> other content value…
>>>> Suggestions?
>>> 
>>> if you can access the register under U-Boot and read out the
>>> expected values, then the access should work under Linux too,
>>> assuming the chip select config is not overwritten somewhere
>>> while booting and the register address range is mapped correctly.
>>> I don't know your code, so I would first check if the register
>>> mapping is done correctly, i.e. check the return value of ioremap()
>>> for errors, then check if the chip select configuration is still
>>> valid when the kernel is up. Also verify that your fpga is not
>>> in the reset state when Linux is running.
>>> 
>>> thanks,
>>> 
>>> Anatolij
>> 
>>