[PATCH] powerpc/fsl: add property 'reg' to pcie at 0 node

[Kevin Hao]

On Wed, May 08, 2013 at 05:17:21PM +0800, Minghuan Lian wrote:
> The property 'reg' is used to identify the PCIe device. if there is
> no 'reg' the PCI driver can not find PCI device node corresponding
> to PCI controller, and can not map the interrupts. So all the INTx
> interrupts can not be used.

The fix for this issue has already been merged into upstream kernel.
commit 9e2ecdbba3b0745f9ed454ab86961e3ccf9dc224
Author: Kevin Hao <haokexin at gmail.com>
Date:   Sun Apr 14 13:40:13 2013 +0800

    powerpc/fsl-booke: add the reg prop for pci bridge device node for T4/B4
    
    The reg property in the pci bridge device node is used to bind this
    device node to the pci bridge device. Then all the pci devices under
    this bridge could use the interrupt maps defined in this device node
    to do the irq translation. So if this property is missed, the pci
    traditional irq mechanism will not work.
    
    Signed-off-by: Kevin Hao <haokexin at gmail.com>
    Signed-off-by: Kumar Gala <galak at kernel.crashing.org>

Thanks,
Kevin

> 
> Signed-off-by: Minghuan Lian <Minghuan.Lian at freescale.com>
> ---
>  arch/powerpc/boot/dts/fsl/b4si-post.dtsi    | 1 +
>  arch/powerpc/boot/dts/fsl/t4240si-post.dtsi | 4 ++++
>  2 files changed, 5 insertions(+)
> 
> diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> index 7399154..d82c8da 100644
> --- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> @@ -49,6 +49,7 @@
>  	interrupts = <20 2 0 0>;
>  	fsl,iommu-parent = <&pamu0>;
>  	pcie at 0 {
> +		reg = <0 0 0 0 0>;
>  		#interrupt-cells = <1>;
>  		#size-cells = <2>;
>  		#address-cells = <3>;
> diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
> index bd611a9..3a6179f 100644
> --- a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
> @@ -48,6 +48,7 @@
>  	bus-range = <0x0 0xff>;
>  	interrupts = <20 2 0 0>;
>  	pcie at 0 {
> +		reg = <0 0 0 0 0>;
>  		#interrupt-cells = <1>;
>  		#size-cells = <2>;
>  		#address-cells = <3>;
> @@ -74,6 +75,7 @@
>  	bus-range = <0 0xff>;
>  	interrupts = <21 2 0 0>;
>  	pcie at 0 {
> +		reg = <0 0 0 0 0>;
>  		#interrupt-cells = <1>;
>  		#size-cells = <2>;
>  		#address-cells = <3>;
> @@ -100,6 +102,7 @@
>  	bus-range = <0x0 0xff>;
>  	interrupts = <22 2 0 0>;
>  	pcie at 0 {
> +		reg = <0 0 0 0 0>;
>  		#interrupt-cells = <1>;
>  		#size-cells = <2>;
>  		#address-cells = <3>;
> @@ -126,6 +129,7 @@
>  	bus-range = <0x0 0xff>;
>  	interrupts = <23 2 0 0>;
>  	pcie at 0 {
> +		reg = <0 0 0 0 0>;
>  		#interrupt-cells = <1>;
>  		#size-cells = <2>;
>  		#address-cells = <3>;
> -- 
> 1.8.1.2
> 
> 
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