[PATCH] powerpc/85xx: workaround for chips with MSI hardware errata
B38951 at freescale.com
Thu Mar 14 22:04:26 EST 2013
> -----Original Message-----
> From: Wood Scott-B07421
> Sent: Thursday, March 14, 2013 4:24 AM
> To: Michael Ellerman
> Cc: Jia Hongtao-B38951; linuxppc-dev at lists.ozlabs.org;
> galak at kernel.crashing.org; Wood Scott-B07421
> Subject: Re: [PATCH] powerpc/85xx: workaround for chips with MSI hardware
> On 03/13/2013 12:04:03 AM, Michael Ellerman wrote:
> > On Tue, Mar 12, 2013 at 03:48:02PM +0800, Jia Hongtao wrote:
> > > The MPIC chip with version 2.0 has a MSI errata (errata PIC1 of
> > mpc8544),
> > > It causes that neither MSI nor MSI-X can work fine. This is a
> > workaround
> > > to allow MSI-X to function properly.
> > You say "neither MSI nor MSI-X can work fine", which I take to mean
> > "both MSI and MSI-X do not work".
> > But then you say this is a workaround to allow MSI-X to work.
> > So what I think you mean is, the erratum prevents both MSI and MSI-X
> > from working. This is a workaround that allows MSI-X to work, and in
> > addition the patch prevents MSI from being used on chips with the
> > erratum - because there is no workaround for MSI.
> There actually is a workaround for MSI, but it's more complicated and not
> implemented by this patch.
> We could also possibly get away with allowing exactly one MSI
> (byteswapping doesn't matter if the value is zero) -- not sure how hard
> that would be.
For now we have no plan to support MSI workaround. Also MSI workaround
deserve a new patch :)
I will sent V2 of this patch soon.
> > > + list_for_each_entry(msi, &msi_head, list)
> > > + if (msi->feature & MSI_HW_ERRATA_ENDIAN)
> > > + return -EINVAL;
> > I take it you're happy preventing MSI for all devices even if only a
> > single chip in the machine has the erratum? In practice you probably
> > have all or none with the erratum right?
> Yes, it's all integrated onto one chip (the SoC itself). In fact there
> should only be one MSI block on these chips.
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