[PATCH 1/3] powerpc/mpc85xx: remove the unneeded pci init functions for corenet ds board

[Kevin Hao]

On Fri, May 31, 2013 at 08:11:20PM +1000, Benjamin Herrenschmidt wrote:
> On Fri, 2013-05-31 at 14:41 +0800, Kevin Hao wrote:
> > Hi Ben,
> > 
> > Could you shed some light on this issue? Do we really has the restriction
> > that we have to pick one bus controller as primary even there is no
> > ISA bus on the board? I did check the current code and found no code
> > has a requirement for this. I also searched the archives and but found
> > nothing useful. :-(
> 
> You can just pick the first one as primary... The reason we somewhat need
> a primary is related to how we handle IO space.
> 
> We ioremap the IO space of all busses and assign the base of the primary
> one to a global "_IO_BASE". Then any "port" access is an offset from that
> which means that non-primary can end up having negative offsets. We fix
> up all resources, which works fine ... unless drivers do stupid casts
> and the wrap-around fails.
> 
> The main reason we did that originally is because we still had a slew of
> x86 originated HW that would access hard wired IO ports, especially on things
> like CHRP machines, looking for things like 8259 PIC, legacy kbd controllers,
> UARTs, etc... at fixed IO port numbers.
> 
> We still support some of these boxes (though I do wonder how long since
> somebody last booted a Pegasos) so I'm not quite yet keen on getting rid
> of that stuff...

Thanks for the detailed explanation. But I don't mean to drop the support
of the primary bus. As you said, this is definitely needed now in order to
make some legacy device drivers work. What I want to do is not to pick a
primary bus if there is no such ISA devices at all. For example, on a fsl
p4080ds board, we would do the following in the current kernel:

	/* pick up a random host bridge as primary bus */
	for_each_matching_node(np, pci_ids) {
		...
	}

	/* for host bridge 0 */
	fsl_add_bridge(pdev, primary = 1) { 
		...
		pci_process_bridge_OF_ranges(hose, dev, is_primary = 1);
	}

	/* for host bridge 1*/
	fsl_add_bridge(pdev, primary = 0) {
		...
		pci_process_bridge_OF_ranges(hose, dev, is_primary = 0);
	}

But there is no ISA bus on this board and we also don't need to support any
fixed IO port numbers. So it seems redundant to iterate the device list to
pick a host bridge as primary bus. So we can simply change the above to:

	/* for host bridge 0 */
	fsl_add_bridge(pdev, primary = 0) {
		...
		pci_process_bridge_OF_ranges(hose, dev, is_primary = 0);
	}

	/* for host bridge 1*/
	fsl_add_bridge(pdev, primary = 0) {
		...
		pci_process_bridge_OF_ranges(hose, dev, is_primary = 0);
	}


The effect of this change is that the isa_io_base will be 0 and the IO
resource are equal to the virtual address of the IO space. But the IO
functions such as outx/inx should work as well. This is why I ask the
above question. What do you think about this? Are there any subtle bugs
that will be triggered by this?

Thanks,
Kevin

> 
> Cheers,
> Ben.
> 
> 
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