[RFC 1/2] fsl/pm: combined the idle(PH&PW) state

[Wang Dongsheng-B40534]

> -----Original Message-----
> From: Wood Scott-B07421
> Sent: Tuesday, July 30, 2013 1:22 AM
> To: Wang Dongsheng-B40534
> Cc: benh at kernel.crashing.org; galak at kernel.crashing.org; Zhao Chenhui-
> B35336; Li Yang-R58472; Wang Dongsheng-B40534
> Subject: Re: [RFC 1/2] fsl/pm: combined the idle(PH&PW) state
> 
> On 07/10/2013 03:27:55 AM, Dongsheng Wang wrote:
> > From: Wang Dongsheng <dongsheng.wang at freescale.com>
> >
> > move wait instructions from idle_e500.S to idle_book3e.S
> >
> > idle_e500.S: rename e500_idle to e500_idle_ph.
> 
> What does _ph mean?
> 
> If this is a reference to the new PHnn/PWnn terminology used on e6500, I
> don't see how that's relevant to this file, which isn't used on e6500.
> Or if you do plan to use this on e6500, why?
> 
ph10/ph15 means doze/nap on freescale e500 family processors. On the IBM
platform does not "ph" concept.

Yes, "ph" maybe that's not a good idea. We should keep e500_idle.
On e500 processor, there is doze/nap, but e500mc/e5500/e6500 is using "wait".

I want to move "wait" from idle_e500.S into idle_book3e.S, but "book3e" means
64bit mode... Now 32bit using idle_e500, 64bit using idle_book3e, and the idle method
does not distinguish according to the platform, only in accordance with the CPU
running mode(32bit/64bit) to distinguish.

So did you have any idea about this? Or another way as follows,

We do not touch idle_e500.S and idle_e6500.S, add fsl_cpuidle_wait() into "machdep.h"

arch/powerpc/include/asm/machdep.h
/* Wait for Interrupt */
static inline void fsl_cpuidle_wait(void)
{
#ifdef CONFIG_PPC64
        book3e_idle();
#else
        e500_idle();
#endif
}