[PATCH v2 1/8] powerpc/fsl_booke: protect the access to MAS7 with MMU_FTR_BIG_PHYS
Scott Wood
scottwood at freescale.com
Sat Jul 27 09:14:00 EST 2013
On 07/04/2013 07:54:07 AM, Kevin Hao wrote:
> diff --git a/arch/powerpc/kernel/fsl_booke_entry_mapping.S
> b/arch/powerpc/kernel/fsl_booke_entry_mapping.S
> index a92c79b..2201f84 100644
> --- a/arch/powerpc/kernel/fsl_booke_entry_mapping.S
> +++ b/arch/powerpc/kernel/fsl_booke_entry_mapping.S
> @@ -88,9 +88,11 @@ skpinv: addi r6,r6,1
> /* Increment */
> 1: mflr r7
>
> mfspr r8,SPRN_MAS3
> -#ifdef CONFIG_PHYS_64BIT
> +BEGIN_MMU_FTR_SECTION
> mfspr r23,SPRN_MAS7
> -#endif
> +MMU_FTR_SECTION_ELSE
> + li r23,0
> +ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_BIG_PHYS)
> and r8,r6,r8
> subfic r9,r6,-4096
> and r9,r9,r7
> diff --git a/arch/powerpc/kernel/head_fsl_booke.S
> b/arch/powerpc/kernel/head_fsl_booke.S
> index d10a7ca..a04a48d 100644
> --- a/arch/powerpc/kernel/head_fsl_booke.S
> +++ b/arch/powerpc/kernel/head_fsl_booke.S
> @@ -82,7 +82,11 @@ _ENTRY(_start);
> and r19,r3,r18 /* r19 = page offset */
> andc r31,r20,r18 /* r31 = page base */
> or r31,r31,r19 /* r31 = devtree phys addr */
> +BEGIN_MMU_FTR_SECTION
> mfspr r30,SPRN_MAS7
> +MMU_FTR_SECTION_ELSE
> + li r30,0
> +ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_BIG_PHYS)
Code patching hasn't been done yet at this point.
-Scott
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