[PATCH V2 2/2] powerpc/85xx: add the P1020RDB-PD DTS support

[Scott Wood]

On 07/04/2013 07:05:00 PM, Haijun Zhang wrote:
> diff --git a/arch/powerpc/boot/dts/p1020rdb-pc.dtsi  
> b/arch/powerpc/boot/dts/p1020rdb-pc.dtsi
> index c952cd3..9d24501 100644
> --- a/arch/powerpc/boot/dts/p1020rdb-pc.dtsi
> +++ b/arch/powerpc/boot/dts/p1020rdb-pc.dtsi
> @@ -131,9 +131,7 @@
>  	};
> 
>  	cpld at 3,0 {
> -		#address-cells = <1>;
> -		#size-cells = <1>;
> -		compatible = "cpld";
> +		compatible = "fsl, p1020rdb-cpld";

No space after "fsl,".

> +			partition at fs {
> +				/* 4MB for Compressed RFS Image */
> +				reg = <0x00500000 0x00400000>;
> +				label = "file system";
> +			};
> +
> +			partition at jffs-fs {
> +				/* 7MB for JFFS2 based RFS */
> +				reg = <0x00900000 0x00700000>;
> +				label = "file system jffs2";
> +			};
> +		};
> +		slic at 0 {
> +			compatible = "zarlink,le88266";
> +			reg = <1>;
> +			spi-max-frequency = <8000000>;
> +		};
> +		slic at 1 {
> +			compatible = "zarlink,le88266";
> +			reg = <2>;
> +			spi-max-frequency = <8000000>;
> +		};
> +
> +	};

Remove that last blank line, and insert a blank line before each  
"slic at ..." (like you do between the partition nodes).

> +	/* USB2 is shared with localbus, so it must be disabled
> +	   by default. We can't put 'status = "disabled";' here
> +	   since U-Boot doesn't clear the status property when
> +	   it enables USB2. OTOH, U-Boot does create a new node
> +	   when there isn't any. So, just comment it out.
> +	*/

/*
  * Linux multi-line
  * comment style
  * is like this.
  */

> +	usb at 23000 {
> +		status = "disabled";
> +		phy_type = "ulpi";
> +	};

Didn't you just say above that you can't use status = "disabled"?

And can U-Boot be fixed to set status = "disabled" on whichever I/O is  
not usable?

> +/include/ "fsl/p1020si-pre.dtsi"
> +/ {
> +	model = "fsl,P1020RDB-PD";
> +	compatible = "fsl,P1020RDB-PD";
> +
> +	memory {
> +		device_type = "memory";
> +	};
> +
> +	lbc: localbus at ffe05000 {
> +		reg = <0x0 0xffe05000 0x0 0x1000>;
> +
> +		/* NOR, NAND flash and L2 switch */
> +		ranges = <0x0 0x0 0x0 0xec000000 0x04000000
> +			  0x1 0x0 0x0 0xff800000 0x00040000
> +			  0x2 0x0 0x0 0xffa00000 0x00020000
> +			  0x3 0x0 0x0 0xffb00000 0x00020000>;

If you're going to have a comment here about what is mapped by the  
ranges, why exclude the CPLD?

-Scott