[PATCH V3 1/5] powerpc, perf: Add new BHRB related instructions for POWER8
Michael Neuling
mikey at neuling.org
Mon Apr 22 11:13:43 EST 2013
Michael Ellerman <michael at ellerman.id.au> wrote:
> On Thu, Apr 18, 2013 at 05:56:12PM +0530, Anshuman Khandual wrote:
> > This patch adds new POWER8 instruction encoding for reading
> > the BHRB buffer entries and also clearing it. Encoding for
> > "clrbhrb" instruction is straight forward.
>
> Which is "clear branch history rolling buffer" ?
>
> > But "mfbhrbe"
> > encoding involves reading a certain index of BHRB buffer
> > into a particular GPR register.
>
> And "Move from branch history rolling buffer entry" ?
>
> > diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
> > index 8752bc8..93ae5a1 100644
> > --- a/arch/powerpc/include/asm/ppc-opcode.h
> > +++ b/arch/powerpc/include/asm/ppc-opcode.h
> > @@ -82,6 +82,7 @@
> > #define __REGA0_R31 31
> >
> > /* sorted alphabetically */
> > +#define PPC_INST_BHRBE 0x7c00025c
>
> I don't think you really need this, just use the literal value below.
The rest of the defines in this file do this, so Anshuman's right.
> > @@ -297,6 +298,12 @@
> > #define PPC_NAP stringify_in_c(.long PPC_INST_NAP)
> > #define PPC_SLEEP stringify_in_c(.long PPC_INST_SLEEP)
> >
> > +/* BHRB instructions */
> > +#define PPC_CLRBHRB stringify_in_c(.long 0x7c00035c)
> > +#define PPC_MFBHRBE(r, n) stringify_in_c(.long PPC_INST_BHRBE | \
> > + __PPC_RS(r) | \
> > + (((n) & 0x1f) << 11))
>
> Why are you not using ___PPC_RB(n) here ?
Actually, this is wrong. The number field should be 10 bits (0x3ff),
not 5 (0x1f) Anshuman please fix.
Mikey
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