[PATCH 2/5] powerpc/fsl-booke: Add initial silicon device tree files for B4860 and B4420

Leekha Shaveta-B20052 B20052 at freescale.com
Wed Apr 3 17:42:14 EST 2013



-----Original Message-----
From: Wood Scott-B07421 
Sent: Wednesday, April 03, 2013 12:49 AM
To: Leekha Shaveta-B20052
Cc: linuxppc-dev at lists.ozlabs.org; Zhao Chenhui-B35336; Lian Minghuan-B31939; Leekha Shaveta-B20052; Garg Vakul-B16394; Tang Yuantian-B29983; Fleming Andy-AFLEMING; Mehresh Ramneek-B31383; Sethi Varun-B16395
Subject: Re: [PATCH 2/5] powerpc/fsl-booke: Add initial silicon device tree files for B4860 and B4420

On 04/02/2013 02:16:05 AM, Shaveta Leekha wrote:
> +/ {
> +	compatible = "fsl,B4860";
> +
> +	cpus {
> +		cpu1: PowerPC,e6500 at 1 {
> +			device_type = "cpu";
> +			reg = <2 3>;
> +			next-level-cache = <&L2>;
> +		};
> +		cpu2: PowerPC,e6500 at 2 {
> +			device_type = "cpu";
> +			reg = <4 5>;
> +			next-level-cache = <&L2>;
> +		};
> +		cpu3: PowerPC,e6500 at 3 {
> +			device_type = "cpu";
> +			reg = <6 7>;
> +			next-level-cache = <&L2>;
> +		};

The unit addresses need to match "reg".
[SL] You mean  "@1" should match to "reg = <2 3>" ?
As each e6500 core in B4860 is dual- threaded, reg property here represents the thread's identifier in that PA core.

So convention used in T4 and B4 is: core 0 having threads 0 and 1,
						Core 1 having <2 3> and so on....

Regards,
Shaveta



-Scott



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