[PATCH][v2] powerpc/fsl-pci: use 'Header Type' to identify PCIE mode

[Kumar Gala]

On Sep 24, 2012, at 12:50 AM, Minghuan Lian wrote:

> The original code uses 'Programming Interface' field to judge if PCIE is
> EP or RC mode, however, some latest silicons do not support this functionality.
> According to PCIE specification, 'Header Type' offset 0x0e is used to
> indicate header type, so change code to use 'Header Type' field to
> judge PCIE mode. Because FSL PCI controller does not support 'Header Type',
> patch still uses 'Programming Interface' to identify PCI mode.
> 
> Signed-off-by: Minghuan Lian <Minghuan.Lian at freescale.com>
> Signed-off-by: Roy Zang <tie-fei.zang at freescale.com>
> ---
> Change log:
> v2 - 
> keep the original PCI initialization order according to kumar's recommendations.
> 
> arch/powerpc/sysdev/fsl_pci.c |   37 ++++++++++++++++++++++++-------------
> 1 file changed, 24 insertions(+), 13 deletions(-)

applied to next

- k