[PATCH] powerpc/mpc85xx: Change spin table to cached memory

Gala Kumar-B11780 B11780 at freescale.com
Mon Nov 26 00:01:17 EST 2012

On Sep 29, 2012, at 6:44 PM, York Sun wrote:

> ePAPR v1.1 requires the spin table to be in cached memory. So we need
> to change the call argument of ioremap to enable cache and coherence.
> We also flush the cache after writing to spin table to keep it compatible
> with previous cache-inhibit spin table. Flushing before and after
> accessing spin table is recommended by ePAPR.
> Signed-off-by: York Sun <yorksun at freescale.com>
> Acked-by: Timur Tabi <timur at freescale.com>
> ---
> This patch applies to git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git next branch.
> arch/powerpc/platforms/85xx/smp.c |   49 +++++++++++++++++++++++++++----------
> 1 file changed, 36 insertions(+), 13 deletions(-)

applied to next

- k

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