RFC: book3e: DCR MMIO for IBM Blue Gene/Q
Jimi Xenidis
jimix at pobox.com
Tue Nov 6 02:25:34 EST 2012
On Nov 4, 2012, at 9:23 PM, Jimi Xenidis wrote:
>
>
> On Nov 4, 2012, at 5:51 PM, Benjamin Herrenschmidt <benh at kernel.crashing.org> wrote:
>
>> On Sun, 2012-11-04 at 10:32 -0600, Jimi Xenidis wrote:
>>> I want to use the stuff in arch/platform/sysdev/dcr.c and I have a couple of questions:
>>> 1) anyone have a good devtree binding for this?
>>
>> Not really, I think the cell stuff was the last we looked at this.
>>
>>> I'm thinking:
>>> bgq {
>>> #address-cells = <2>;
>>> #size-cells = <2>;
>>> ...
>>>
>>> dcr {
>>> reg = <0x3ff 0xe0000000 0x0 0x08000000>;
>>> compatible = "ibm,bgq-dcr";
>>> dcr-controller;
>>> dcr-access-method = "mmio";
>>> dcr-mmio-stride = <??>;
>>> };
>>> };
>>>
>>> I'm not sure what stride I will use since I have yet to figure out the DCR numbering in play at the moment, which will be painful.
>>> Also, some clarity to the following would be nice:
>>> /* Stride is not properly defined yet, default to 0x10 for Axon */
>>> p = of_get_property(dp, "dcr-mmio-stride", NULL);
>>> stride = (p == NULL) ? 0x10 : *p;
>>>
>>> /* XXX FIXME: Which property name is to use of the 2 following ? */
>>> p = of_get_property(dp, "dcr-mmio-range", NULL);
>>> if (p == NULL)
>>> p = of_get_property(dp, "dcr-mmio-space", NULL);
>>> if (p == NULL)
>>> goto done;
>>
>> Not sure what SLOF did back then. dcr-mmio-range sounds better to me.
>>
>>> I guess my "reg" property is not useful to the code?
>>
>> Right, unless the DCR "bridge" has some registers of its own. It's also
>> handy to have as a "standard" way of representing the memory used by the
>> DCR bridge, tho that does mean duplication... but then it allows you to
>> have a nice unit address.
>
> umm, was there a conclusion here? :-)
> -jx
>
>>
>>> Is there a preference over dcr-mmio-range/space or in the absence of these to we should use "reg"?
>>>
>>> 2) I need 64 bit reads and writes
>>> My intention is to have dcr_{read,write}_generic_{mmio,native} take an unsigned long for value all the way down.
>>> For the native case, this would make is similar to mtspr and mfspr.
>>> For the MMIO case, the selected in/out size would be based on "#ifdef __powerpc64__"
>>
>> As long as it doesn't break Axon...
So Axon, being 64-bit, would break with the changes proposed, since it is 64-bit bit and assumes 32bit accessors.
I'll simply add 64bit accessors for now.
-jx
>>
>> Cheers,
>> Ben.
>>
>>> Thoughts?
>>>
>>> -jx
>>
>>
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