[PATCH 0/3] powerpc/fsl: PCI refactoring and QEMU paravirt platform
scottwood at freescale.com
Fri Jun 29 02:31:08 EST 2012
On 06/27/2012 11:06 PM, Jia Hongtao-B38951 wrote:
>> -----Original Message-----
>> From: Wood Scott-B07421
>> Sent: Thursday, June 28, 2012 7:49 AM
>> To: galak at kernel.crashing.org
>> Cc: agraf at suse.de; linuxppc-dev at lists.ozlabs.org; Jia Hongtao-B38951
>> Subject: [PATCH 0/3] powerpc/fsl: PCI refactoring and QEMU paravirt
>> The QEMU stuff is related to the PCI refactoring because currently
>> we have a hard time selecting a primary bus under QEMU, and also because
>> the generic qemu e500 platform wants a full list of FSL PCI compatibles
>> to check.
> It seems that not all primary bus has "isa" node like 8541 and 8555.
Do those boards (it's the boards that matter, not chips...) have legacy
ISA? If they do, and it's not in the device tree, then we should fix
the device tree for consistency, but also retain some sort of hack to
remain compatible with old device trees.
A board can refrain from using the new common infrastructure if it has a
good reason to.
> Without PM support for pci controllers I totally agree with this refactoring
> for pci init. But in linux mechanism PM ops should be registered to a driver.
> Do you have any ideas to add PM support for pci controllers under this patchset?
This isn't meant to be instead of making it a platform device. It's
just meant to get us away from board-specific code and primary-bus
hardcoding now, rather than once we sort out all the issues with
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